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dzn: Bind buffers for bindless descriptor sets
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>
This commit is contained in:
Jesse Natalie
Marge Bot
parent
5f61e66024
commit
8bd5fbf8ed
1 changed files with 108 additions and 41 deletions
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@ -28,6 +28,8 @@
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#include "vk_format.h"
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#include "vk_util.h"
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#include "dxil_spirv_nir.h"
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#if D3D12_SDK_VERSION >= 608
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static const D3D12_BARRIER_SYNC D3D12_BARRIER_SYNC_INPUT_ASSEMBLER = D3D12_BARRIER_SYNC_INDEX_INPUT;
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#endif
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@ -3061,63 +3063,66 @@ dzn_cmd_buffer_update_heaps(struct dzn_cmd_buffer *cmdbuf, uint32_t bindpoint)
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cmdbuf->state.bindpoint[bindpoint].pipeline;
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if (!(cmdbuf->state.bindpoint[bindpoint].dirty & DZN_CMD_BINDPOINT_DIRTY_HEAPS))
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goto set_heaps;
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return;
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dzn_foreach_pool_type (type) {
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uint32_t desc_count = pipeline->desc_count[type];
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if (!desc_count)
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continue;
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if (device->bindless) {
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new_heaps[type] = &device->device_heaps[type].heap;
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} else {
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uint32_t desc_count = pipeline->desc_count[type];
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if (!desc_count)
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continue;
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struct dzn_descriptor_heap_pool *pool =
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type == D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV ?
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&cmdbuf->cbv_srv_uav_pool : &cmdbuf->sampler_pool;
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struct dzn_descriptor_heap *dst_heap = NULL;
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uint32_t dst_heap_offset = 0;
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struct dzn_descriptor_heap_pool *pool =
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type == D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV ?
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&cmdbuf->cbv_srv_uav_pool : &cmdbuf->sampler_pool;
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struct dzn_descriptor_heap *dst_heap = NULL;
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uint32_t dst_heap_offset = 0;
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dzn_descriptor_heap_pool_alloc_slots(pool, device, desc_count,
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&dst_heap, &dst_heap_offset);
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new_heap_offsets[type] = dst_heap_offset;
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update_root_desc_table[type] = true;
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dzn_descriptor_heap_pool_alloc_slots(pool, device, desc_count,
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&dst_heap, &dst_heap_offset);
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new_heap_offsets[type] = dst_heap_offset;
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update_root_desc_table[type] = true;
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for (uint32_t s = 0; s < MAX_SETS; s++) {
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const struct dzn_descriptor_set *set = desc_state->sets[s].set;
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if (!set) continue;
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for (uint32_t s = 0; s < MAX_SETS; s++) {
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const struct dzn_descriptor_set *set = desc_state->sets[s].set;
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if (!set) continue;
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uint32_t set_heap_offset = pipeline->sets[s].heap_offsets[type];
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uint32_t set_desc_count = pipeline->sets[s].range_desc_count[type];
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if (set_desc_count) {
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dzn_descriptor_heap_copy(device, dst_heap, dst_heap_offset + set_heap_offset,
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&set->pool->heaps[type], set->heap_offsets[type],
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set_desc_count, type);
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}
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uint32_t set_heap_offset = pipeline->sets[s].heap_offsets[type];
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uint32_t set_desc_count = pipeline->sets[s].range_desc_count[type];
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if (set_desc_count) {
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dzn_descriptor_heap_copy(device, dst_heap, dst_heap_offset + set_heap_offset,
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&set->pool->heaps[type], set->heap_offsets[type],
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set_desc_count, type);
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}
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if (type == D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV) {
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uint32_t dynamic_buffer_count = pipeline->sets[s].dynamic_buffer_count;
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for (uint32_t o = 0; o < dynamic_buffer_count; o++) {
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struct dzn_buffer_desc bdesc = set->dynamic_buffers[o];
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bdesc.offset += desc_state->sets[s].dynamic_offsets[o];
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if (type == D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV) {
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uint32_t dynamic_buffer_count = pipeline->sets[s].dynamic_buffer_count;
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for (uint32_t o = 0; o < dynamic_buffer_count; o++) {
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struct dzn_buffer_desc bdesc = set->dynamic_buffers[o];
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bdesc.offset += desc_state->sets[s].dynamic_offsets[o];
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bool primary_is_writable = bdesc.type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC;
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uint32_t desc_heap_offset = pipeline->sets[s].dynamic_buffer_heap_offsets[o].primary;
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dzn_descriptor_heap_write_buffer_desc(device, dst_heap,
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dst_heap_offset + set_heap_offset + desc_heap_offset,
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primary_is_writable, &bdesc);
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if (pipeline->sets[s].dynamic_buffer_heap_offsets[o].alt != ~0) {
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assert(!primary_is_writable);
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desc_heap_offset = pipeline->sets[s].dynamic_buffer_heap_offsets[o].alt;
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bool primary_is_writable = bdesc.type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC;
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uint32_t desc_heap_offset = pipeline->sets[s].dynamic_buffer_heap_offsets[o].primary;
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dzn_descriptor_heap_write_buffer_desc(device, dst_heap,
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dst_heap_offset + set_heap_offset + desc_heap_offset,
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false, &bdesc);
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primary_is_writable, &bdesc);
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if (pipeline->sets[s].dynamic_buffer_heap_offsets[o].alt != ~0) {
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assert(!primary_is_writable);
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desc_heap_offset = pipeline->sets[s].dynamic_buffer_heap_offsets[o].alt;
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dzn_descriptor_heap_write_buffer_desc(device, dst_heap,
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dst_heap_offset + set_heap_offset + desc_heap_offset,
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false, &bdesc);
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}
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}
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}
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}
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}
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new_heaps[type] = dst_heap;
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new_heaps[type] = dst_heap;
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}
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}
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set_heaps:
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if (new_heaps[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV] != cmdbuf->state.heaps[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV] ||
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new_heaps[D3D12_DESCRIPTOR_HEAP_TYPE_SAMPLER] != cmdbuf->state.heaps[D3D12_DESCRIPTOR_HEAP_TYPE_SAMPLER]) {
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ID3D12DescriptorHeap *desc_heaps[2];
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@ -3146,6 +3151,68 @@ set_heaps:
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else
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ID3D12GraphicsCommandList1_SetComputeRootDescriptorTable(cmdbuf->cmdlist, r, handle);
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}
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if (device->bindless) {
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for (uint32_t s = 0; s < MAX_SETS; ++s) {
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const struct dzn_descriptor_set *set = desc_state->sets[s].set;
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if (!set || !set->pool->bindless.buf)
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continue;
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uint32_t dirty_bit = DZN_CMD_BINDPOINT_DIRTY_DESC_SET0 << s;
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if (cmdbuf->state.bindpoint[bindpoint].dirty & dirty_bit) {
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uint64_t gpuva = set->pool->bindless.gpuva + (set->heap_offsets[0] * sizeof(struct dxil_spirv_bindless_entry));
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if (bindpoint == VK_PIPELINE_BIND_POINT_GRAPHICS)
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ID3D12GraphicsCommandList1_SetGraphicsRootShaderResourceView(cmdbuf->cmdlist, s, gpuva);
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else
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ID3D12GraphicsCommandList1_SetComputeRootShaderResourceView(cmdbuf->cmdlist, s, gpuva);
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}
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}
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if (pipeline->dynamic_buffer_count &&
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(cmdbuf->state.bindpoint[bindpoint].dirty & DZN_CMD_BINDPOINT_DIRTY_DYNAMIC_BUFFERS)) {
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ID3D12Resource *dynamic_buffer_buf = NULL;
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VkResult result =
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dzn_cmd_buffer_alloc_internal_buf(cmdbuf, sizeof(struct dxil_spirv_bindless_entry) * pipeline->dynamic_buffer_count,
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D3D12_HEAP_TYPE_UPLOAD,
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D3D12_RESOURCE_STATE_GENERIC_READ,
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&dynamic_buffer_buf);
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if (result != VK_SUCCESS)
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return;
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uint64_t gpuva = ID3D12Resource_GetGPUVirtualAddress(dynamic_buffer_buf);
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struct dxil_spirv_bindless_entry *map;
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ID3D12Resource_Map(dynamic_buffer_buf, 0, NULL, (void **)&map);
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for (uint32_t s = 0; s < MAX_SETS; ++s) {
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const struct dzn_descriptor_set *set = desc_state->sets[s].set;
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if (!set)
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continue;
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uint32_t dynamic_buffer_count = pipeline->sets[s].dynamic_buffer_count;
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for (uint32_t o = 0; o < dynamic_buffer_count; o++) {
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const struct dzn_buffer_desc *bdesc = &set->dynamic_buffers[o];
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struct dxil_spirv_bindless_entry *map_entry = &map[pipeline->sets[s].dynamic_buffer_heap_offsets[o].primary];
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if (*bdesc->bindless_descriptor_slot >= 0) {
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map_entry->buffer_idx = *bdesc->bindless_descriptor_slot;
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map_entry->buffer_offset = desc_state->sets[s].dynamic_offsets[o];
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} else {
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map_entry->buffer_idx = bdesc->type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC ?
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bdesc->buffer->uav_bindless_slot : bdesc->buffer->cbv_bindless_slot;
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map_entry->buffer_offset = bdesc->offset + desc_state->sets[s].dynamic_offsets[o];
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}
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}
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}
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ID3D12Resource_Unmap(dynamic_buffer_buf, 0, NULL);
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if (bindpoint == VK_PIPELINE_BIND_POINT_GRAPHICS)
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ID3D12GraphicsCommandList1_SetGraphicsRootShaderResourceView(cmdbuf->cmdlist,
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pipeline->root.dynamic_buffer_bindless_param_idx,
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gpuva);
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else
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ID3D12GraphicsCommandList1_SetComputeRootShaderResourceView(cmdbuf->cmdlist,
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pipeline->root.dynamic_buffer_bindless_param_idx,
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gpuva);
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}
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}
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}
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static void
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