From 8b1dc77521d718bfa9cdc16705dc6484debfd2cc Mon Sep 17 00:00:00 2001
From: Francisco Jerez <currojerez@riseup.net>
Date: Wed, 3 Aug 2022 16:51:43 -0700
Subject: [PATCH] intel/fs/xe2+: Scale BRW_MAX_MSG_LENGTH by native register
 size.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
---
 src/intel/compiler/brw_fs_generator.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 32324e84fd8..0c1d1fc6a57 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1758,7 +1758,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
       assert(inst->force_writemask_all || inst->exec_size >= 4);
       assert(inst->force_writemask_all || inst->group % inst->exec_size == 0);
       assert(inst->base_mrf + inst->mlen <= BRW_MAX_MRF(devinfo->ver));
-      assert(inst->mlen <= BRW_MAX_MSG_LENGTH);
+      assert(inst->mlen <= BRW_MAX_MSG_LENGTH * reg_unit(devinfo));
 
       switch (inst->opcode) {
       case BRW_OPCODE_SYNC: