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winsys/radeon: add a flag telling how gfx IBs should be padded
This is always false on amdgpu (set by calloc). Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
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3 changed files with 10 additions and 6 deletions
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@ -223,6 +223,7 @@ struct radeon_info {
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boolean has_uvd;
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uint32_t vce_fw_version;
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boolean has_userptr;
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bool gfx_ib_pad_with_type2;
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uint32_t r300_num_gb_pipes;
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uint32_t r300_num_z_pipes;
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@ -466,14 +466,10 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
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}
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break;
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case RING_GFX:
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/* pad DMA ring to 8 DWs to meet CP fetch alignment requirements
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/* pad GFX ring to 8 DWs to meet CP fetch alignment requirements
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* r6xx, requires at least 4 dw alignment to avoid a hw bug.
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* hawaii with old firmware needs type2 nop packet.
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* accel_working2 with value 3 indicates the new firmware.
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*/
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if (cs->ws->info.chip_class <= SI ||
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(cs->ws->info.family == CHIP_HAWAII &&
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cs->ws->accel_working2 < 3)) {
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if (cs->ws->info.gfx_ib_pad_with_type2) {
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while (rcs->cdw & 7)
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OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
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} else {
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@ -469,6 +469,13 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
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ws->info.cik_macrotile_mode_array_valid = TRUE;
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}
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/* Hawaii with old firmware needs type2 nop packet.
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* accel_working2 with value 3 indicates the new firmware.
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*/
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ws->info.gfx_ib_pad_with_type2 = ws->info.chip_class <= SI ||
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(ws->info.family == CHIP_HAWAII &&
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ws->accel_working2 < 3);
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return TRUE;
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}
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