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i965/gen8: Make disassembly function match brw's signature.

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gen8_dump_compile will be called indirectly by code common used by
generations before and after the gen8 instruction format change.

Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner 2014-05-08 17:27:31 -07:00
parent 1ef52d6ab3
commit 8a6f7dfc19
4 changed files with 12 additions and 9 deletions
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4
src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
View file

@ -1293,7 +1293,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
} }
if (unlikely(INTEL_DEBUG & DEBUG_WM)) { if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
disassemble(stderr, last_native_inst_offset, next_inst_offset); gen8_dump_compile(brw, store, last_native_inst_offset, next_inst_offset, stderr);
foreach_list(node, &cfg->block_list) { foreach_list(node, &cfg->block_list) {
bblock_link *link = (bblock_link *)node; bblock_link *link = (bblock_link *)node;
@ -1327,7 +1327,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
* case you're doing that. * case you're doing that.
*/ */
if (0 && unlikely(INTEL_DEBUG & DEBUG_WM)) { if (0 && unlikely(INTEL_DEBUG & DEBUG_WM)) {
disassemble(stderr, 0, next_inst_offset); gen8_dump_compile(brw, store, 0, next_inst_offset, stderr);
} }
} }

7
src/mesa/drivers/dri/i965/gen8_generator.cpp
View file

@ -620,13 +620,14 @@ gen8_generator::HALT()
return inst; return inst;
} }
void extern "C" void
gen8_generator::disassemble(FILE *out, int start, int end) gen8_dump_compile(struct brw_context *brw, void *assembly,
int start,int end, FILE *out)
{ {
bool dump_hex = false; bool dump_hex = false;
for (int offset = start; offset < end; offset += 16) { for (int offset = start; offset < end; offset += 16) {
gen8_instruction *inst = &store[offset / 16]; gen8_instruction *inst = &((gen8_instruction *)assembly)[offset / 16];
fprintf(stderr, "0x%08x: ", offset); fprintf(stderr, "0x%08x: ", offset);
if (dump_hex) { if (dump_hex) {

6
src/mesa/drivers/dri/i965/gen8_generator.h
View file

@ -117,8 +117,6 @@ public:
gen8_instruction *NOP(); gen8_instruction *NOP();
/** @} */ /** @} */
void disassemble(FILE *out, int start, int end);
protected: protected:
gen8_instruction *alu3(unsigned opcode, gen8_instruction *alu3(unsigned opcode,
struct brw_reg dst, struct brw_reg dst,
@ -196,3 +194,7 @@ protected:
void *mem_ctx; void *mem_ctx;
}; };
extern "C" void
gen8_dump_compile(struct brw_context *brw, void *assembly,
int start,int end, FILE *out);

4
src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
View file

@ -910,7 +910,7 @@ gen8_vec4_generator::generate_code(exec_list *instructions)
} }
if (unlikely(debug_flag)) { if (unlikely(debug_flag)) {
disassemble(stderr, last_native_inst_offset, next_inst_offset); gen8_dump_compile(brw, store, last_native_inst_offset, next_inst_offset, stderr);
} }
last_native_inst_offset = next_inst_offset; last_native_inst_offset = next_inst_offset;
@ -928,7 +928,7 @@ gen8_vec4_generator::generate_code(exec_list *instructions)
* case you're doing that. * case you're doing that.
*/ */
if (0 && unlikely(debug_flag)) { if (0 && unlikely(debug_flag)) {
disassemble(stderr, 0, next_inst_offset); gen8_dump_compile(brw, store, 0, next_inst_offset, stderr);
} }
} }