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intel/brw: Rename lsc_aop_for_nir_intrinsic to "op" instead of "aop"

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This is going to handle more than atomics shortly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30828>
This commit is contained in:
Kenneth Graunke 2024-08-05 19:36:02 -07:00 • committed by Marge Bot
parent e8883bd40b
commit 8a6903e50d
3 changed files with 9 additions and 9 deletions
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6
src/intel/compiler/brw_fs_nir.cpp
View file

@ -6166,7 +6166,7 @@ fs_nir_emit_intrinsic(nir_to_brw_state &ntb,
brw_reg(), srcs, SURFACE_LOGICAL_NUM_SRCS);
} else {
unsigned num_srcs = info->num_srcs;
enum lsc_opcode op = lsc_aop_for_nir_intrinsic(instr);
enum lsc_opcode op = lsc_op_for_nir_intrinsic(instr);
if (op == LSC_OP_ATOMIC_INC || op == LSC_OP_ATOMIC_DEC) {
assert(num_srcs == 4);
num_srcs = 3;
@ -8075,7 +8075,7 @@ fs_nir_emit_surface_atomic(nir_to_brw_state &ntb, const fs_builder &bld,
{
const intel_device_info *devinfo = ntb.devinfo;
enum lsc_opcode op = lsc_aop_for_nir_intrinsic(instr);
enum lsc_opcode op = lsc_op_for_nir_intrinsic(instr);
int num_data = lsc_op_num_data_values(op);
bool shared = surface.file == IMM && surface.ud == GFX7_BTI_SLM;
@ -8142,7 +8142,7 @@ static void
fs_nir_emit_global_atomic(nir_to_brw_state &ntb, const fs_builder &bld,
nir_intrinsic_instr *instr)
{
enum lsc_opcode op = lsc_aop_for_nir_intrinsic(instr);
enum lsc_opcode op = lsc_op_for_nir_intrinsic(instr);
int num_data = lsc_op_num_data_values(op);
brw_reg dest = get_nir_def(ntb, instr->def);

10
src/intel/compiler/brw_nir.c
View file

@ -2038,12 +2038,12 @@ brw_cmod_for_nir_comparison(nir_op op)
}
enum lsc_opcode
lsc_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic)
lsc_op_for_nir_intrinsic(const nir_intrinsic_instr *intrin)
{
switch (nir_intrinsic_atomic_op(atomic)) {
switch (nir_intrinsic_atomic_op(intrin)) {
case nir_atomic_op_iadd: {
unsigned src_idx;
switch (atomic->intrinsic) {
switch (intrin->intrinsic) {
case nir_intrinsic_image_atomic:
case nir_intrinsic_bindless_image_atomic:
src_idx = 3;
@ -2059,8 +2059,8 @@ lsc_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic)
unreachable("Invalid add atomic opcode");
}
if (nir_src_is_const(atomic->src[src_idx])) {
int64_t add_val = nir_src_as_int(atomic->src[src_idx]);
if (nir_src_is_const(intrin->src[src_idx])) {
int64_t add_val = nir_src_as_int(intrin->src[src_idx]);
if (add_val == 1)
return LSC_OP_ATOMIC_INC;
else if (add_val == -1)

2
src/intel/compiler/brw_nir.h
View file

@ -204,7 +204,7 @@ unsigned brw_nir_api_subgroup_size(const nir_shader *nir,
unsigned hw_subgroup_size);
enum brw_conditional_mod brw_cmod_for_nir_comparison(nir_op op);
enum lsc_opcode lsc_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic);
enum lsc_opcode lsc_op_for_nir_intrinsic(const nir_intrinsic_instr *intrin);
enum brw_reg_type brw_type_for_nir_type(const struct intel_device_info *devinfo,
nir_alu_type type);