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freedreno/registers: Add gen8 descriptor layout
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727>
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Rob Clark
Marge Bot
parent
1d2895b232
commit
8a68c6684b
4 changed files with 123 additions and 0 deletions
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@ -14,6 +14,7 @@
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#include "a6xx_perfcntrs.xml.h"
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#include "a7xx_perfcntrs.xml.h"
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#include "a6xx_descriptors.xml.h"
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#include "a8xx_descriptors.xml.h"
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#include "a6xx.xml.h"
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#endif /* FD6_HW_H */
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@ -11,6 +11,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
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<import file="adreno/a6xx_perfcntrs.xml"/>
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<import file="adreno/a7xx_perfcntrs.xml"/>
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<import file="adreno/a6xx_descriptors.xml"/>
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<import file="adreno/a8xx_descriptors.xml"/>
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<!--
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Each register that is actually being used by driver should have "usage" defined,
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120
src/freedreno/registers/adreno/a8xx_descriptors.xml
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120
src/freedreno/registers/adreno/a8xx_descriptors.xml
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@ -0,0 +1,120 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<database xmlns="http://nouveau.freedesktop.org/"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
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<import file="freedreno_copyright.xml"/>
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<import file="adreno/adreno_common.xml"/>
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<import file="adreno/adreno_pm4.xml"/>
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<import file="adreno/a6xx_enums.xml"/>
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<domain name="A8XX_TEX_SAMP" width="32">
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<doc>Texture sampler dwords</doc>
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<reg32 offset="0" name="0">
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<bitfield name="MIPFILTER_LINEAR_NEAR" pos="0" type="boolean"/>
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<bitfield name="MIPMAPING_DIS" pos="1" type="boolean"/>
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<bitfield name="XY_MAG" low="2" high="3" type="a6xx_tex_filter"/>
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<bitfield name="XY_MIN" low="4" high="5" type="a6xx_tex_filter"/>
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<bitfield name="WRAP_S" low="6" high="8" type="a6xx_tex_clamp"/>
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<bitfield name="WRAP_T" low="9" high="11" type="a6xx_tex_clamp"/>
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<bitfield name="WRAP_R" low="12" high="14" type="a6xx_tex_clamp"/>
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<bitfield name="MSAA_BOX_FILTERING" pos="15" type="boolean"/>
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<bitfield name="LOD_BIAS" low="16" high="28" type="fixed" radix="8"/>
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<bitfield name="ANISO" low="29" high="31" type="a6xx_tex_aniso"/>
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="MAX_LOD" low="0" high="11" type="ufixed" radix="8"/>
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<bitfield name="MIN_LOD" low="12" high="23" type="ufixed" radix="8"/>
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<bitfield name="REDUCTION_MODE" low="24" high="25" type="a6xx_reduction_mode"/>
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<bitfield name="COMPARE_FUNC" low="26" high="28" type="adreno_compare_func"/>
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<bitfield name="CHROMA_LINEAR" pos="29" type="boolean"/>
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<bitfield name="CUBEMAPSEAMLESSFILTOFF" pos="30" type="boolean"/>
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<bitfield name="UNNORM_COORDS" pos="31" type="boolean"/>
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</reg32>
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<reg32 offset="2" name="2">
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<bitfield name="FASTBORDERCOLOREN" pos="0" type="boolean"/>
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<bitfield name="FASTBORDERCOLOR" low="1" high="2" type="a6xx_fast_border_color"/>
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<bitfield name="BCOLOR" low="7" high="31"/>
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</reg32>
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<reg32 offset="3" name="3"/>
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</domain>
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<domain name="A8XX_TEX_MEMOBJ" width="32" varset="chip">
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<doc>Texture memobj dwords</doc>
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<reg32 offset="0" name="0">
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<bitfield name="BASE_LO" low="6" high="31" shr="6"/>
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</reg32>
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<reg32 offset="1" name="1">
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<bitfield name="BASE_HI" low="0" high="16"/>
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<bitfield name="TYPE" low="17" high="19" type="a6xx_tex_type"/>
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<bitfield name="DEPTH" low="20" high="31" type="uint"/>
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</reg32>
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<reg32 offset="2" name="2">
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<bitfield name="WIDTH" low="0" high="14" type="uint"/>
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<bitfield name="HEIGHT" low="15" high="29" type="uint"/>
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<bitfield name="SAMPLES" low="30" high="31" type="a3xx_msaa_samples"/>
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</reg32>
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<reg32 offset="3" name="3">
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<bitfield name="FMT" low="0" high="7" type="a6xx_format"/>
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<bitfield name="SWAP" low="8" high="9" type="a3xx_color_swap"/>
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<bitfield name="SWIZ_X" low="10" high="12" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_Y" low="13" high="15" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_Z" low="16" high="18" type="a6xx_tex_swiz"/>
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<bitfield name="SWIZ_W" low="19" high="21" type="a6xx_tex_swiz"/>
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</reg32>
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<reg32 offset="4" name="4">
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<bitfield name="TILE_MODE" low="0" high="1" type="a6xx_tile_mode"/>
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<bitfield name="FLAG" pos="2" type="boolean"/>
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<bitfield name="PRT_EN" pos="3" type="boolean"/>
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<bitfield name="TILE_ALL" pos="4" type="boolean"/>
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<bitfield name="SRGB" pos="5" type="boolean"/>
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<bitfield name="FLAG_LO" low="6" high="31" shr="6"/>
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<!-- For multiplanar: -->
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<bitfield name="BASE_U_LO" low="6" high="31" shr="6"/>
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</reg32>
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<reg32 offset="5" name="5">
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<bitfield name="FLAG_HI" low="0" high="16"/>
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<!-- For multiplanar: -->
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<bitfield name="BASE_U_HI" low="0" high="16"/>
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<bitfield name="FLAG_BUFFER_PITCH" low="17" high="24" shr="6" type="uint"/>
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<bitfield name="ALL_SAMPLES_CENTER" pos="29" type="boolean"/>
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<bitfield name="MUTABLEEN" pos="31" type="boolean"/>
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</reg32>
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<reg32 offset="6" name="6">
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<bitfield name="TEX_LINE_OFFSET" low="0" high="23" type="uint"/> <!-- PITCH -->
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<bitfield name="MIN_LINE_OFFSET" low="24" high="27" type="uint"/> <!-- PITCHALIGN -->
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<bitfield name="MIPLVLS" low="28" high="31" type="uint"/>
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</reg32>
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<reg32 offset="7" name="7">
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<bitfield name="ARRAY_SLICE_OFFSET" low="0" high="22" shr="12" type="uint"/> <!-- ARRAY_PITCH -->
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<bitfield name="ASO_UNIT" pos="23"/> <!-- 4KB or 32B ? -->
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<bitfield name="MIN_ARRAY_SLIZE_OFFSET" low="24" high="27" shr="12"/> <!-- MIN_LAYERSZ -->
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<bitfield name="GMEM_TILING_FALLBACK_EN" pos="28" type="boolean"/>
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<bitfield name="CORNER_BASED_EN" pos="30" type="boolean"/>
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<bitfield name="GMEM_FULL_SURF" pos="31" type="boolean"/>
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<!-- For multiplanar. This overlaps other single-planar fields: -->
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<bitfield name="UV_OFFSET_H" low="24" high="25" type="ufixed" radix="2"/> <!-- CHROMA_MIDPOINT_X -->
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<bitfield name="UV_OFFSET_V" low="26" high="27" type="ufixed" radix="2"/> <!-- CHROMA_MIDPOINT_Y -->
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</reg32>
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<reg32 offset="8" name="8">
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<bitfield name="FLAG_ARRAY_PITCH" low="0" high="14" shr="4" type="uint"/> <!-- FLAG_BUFFER_ARRAY_PITCH -->
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<!-- log2 size of the first level, required for mipmapping -->
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<bitfield name="FLAG_BUFFER_LOGW" low="24" high="27" type="uint"/>
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<bitfield name="FLAG_BUFFER_LOGH" low="28" high="31" type="uint"/>
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<!-- For multiplanar. This overlaps other single-planar fields: -->
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<bitfield name="BASE_V_LO" low="6" high="31" shr="6"/>
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</reg32>
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<reg32 offset="9" name="9">
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<bitfield name="MIN_LOD_CLAMP" low="19" high="30" type="ufixed" radix="8"/>
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<!-- For multiplanar, this overlaps other fields: -->
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<bitfield name="BASE_V_HI" low="0" high="16"/>
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<bitfield name="UV_PITCH" low="17" high="26"/> <!-- PLANE_PITCH -->
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</reg32>
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<reg32 offset="10" name="10"/>
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<reg32 offset="11" name="11"/>
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<reg32 offset="12" name="12"/>
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<reg32 offset="13" name="13"/>
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<reg32 offset="14" name="14"/>
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<reg32 offset="15" name="15"/>
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</domain>
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</database>
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@ -12,6 +12,7 @@ xml_reg_files = [
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'a6xx_perfcntrs.xml',
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'a7xx_enums.xml',
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'a7xx_perfcntrs.xml',
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'a8xx_descriptors.xml',
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]
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xml_files = xml_reg_files
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