From 8a68ae989d59dca1c4af95e78bdaf21cf05178cb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 9 May 2026 21:37:20 -0400 Subject: [PATCH] ac,radeonsi: remove all frag_coord_xy code This is now dead code. This code is not used by RADV. Reviewed-by: Samuel Pitoiset Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/amd/common/nir/ac_nir.h | 1 - src/amd/common/nir/ac_nir_lower_ps_early.c | 64 ------------------- src/gallium/drivers/radeonsi/gfx/si_shader.c | 4 -- .../drivers/radeonsi/gfx/si_shader_info.c | 1 - .../radeonsi/gfx/si_shader_variant_info.c | 5 -- 5 files changed, 75 deletions(-) diff --git a/src/amd/common/nir/ac_nir.h b/src/amd/common/nir/ac_nir.h index 5c100ad9638..aa1c903def1 100644 --- a/src/amd/common/nir/ac_nir.h +++ b/src/amd/common/nir/ac_nir.h @@ -308,7 +308,6 @@ typedef struct { bool load_sample_positions_always_loads_current_ones; bool dynamic_rasterization_samples; int force_front_face; /* 0 -> keep, 1 -> set to true, -1 -> set to false */ - bool optimize_frag_coord; /* TODO: remove this after RADV can handle it */ bool frag_coord_is_center; /* GL requirement for sample shading */ /* frag_coord/pixel_coord: diff --git a/src/amd/common/nir/ac_nir_lower_ps_early.c b/src/amd/common/nir/ac_nir_lower_ps_early.c index f073cb0e4c9..82ee4ba8220 100644 --- a/src/amd/common/nir/ac_nir_lower_ps_early.c +++ b/src/amd/common/nir/ac_nir_lower_ps_early.c @@ -27,8 +27,6 @@ typedef struct { bool frag_color_is_frag_data0; bool seen_color0_alpha; - bool uses_fragcoord_xy_as_float; - bool use_fragcoord; nir_def *load_helper_invoc_at_top; } lower_ps_early_state; @@ -497,29 +495,6 @@ lower_ps_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin, void *state) return true; } break; - case nir_intrinsic_load_frag_coord_xy: - if (!s->options->optimize_frag_coord) - break; - /* Compute frag_coord.xy from pixel_coord. */ - if (!s->use_fragcoord) { - nir_def *new_fragcoord_xy = nir_u2f32(b, nir_load_pixel_coord(b)); - if (!b->shader->info.fs.pixel_center_integer) - new_fragcoord_xy = nir_fadd_imm(b, new_fragcoord_xy, 0.5); - nir_def_replace(&intrin->def, new_fragcoord_xy); - return true; - } - break; - case nir_intrinsic_load_pixel_coord: - if (!s->options->optimize_frag_coord) - break; - /* There is already a floating-point frag_coord.xy use in the shader. Don't add pixel_coord. - * Instead, compute pixel_coord from frag_coord. - */ - if (s->use_fragcoord) { - nir_def_replace(&intrin->def, nir_f2u16(b, nir_load_frag_coord_xy(b))); - return true; - } - break; default: break; } @@ -541,34 +516,6 @@ gather_info(nir_builder *b, nir_intrinsic_instr *intr, void *state) if (nir_intrinsic_io_semantics(intr).location == FRAG_RESULT_DUAL_SRC_BLEND) s->frag_color_is_frag_data0 = true; break; - case nir_intrinsic_load_frag_coord_xy: - assert(intr->def.bit_size == 32); - nir_foreach_use(use, &intr->def) { - if (nir_src_use_instr(use)->type == nir_instr_type_alu) { - switch (nir_instr_as_alu(nir_src_use_instr(use))->op) { - case nir_op_f2i8: - case nir_op_f2i16: - case nir_op_f2i32: - case nir_op_f2i64: - case nir_op_f2u8: - case nir_op_f2u16: - case nir_op_f2u32: - case nir_op_f2u64: - case nir_op_ftrunc: - case nir_op_ffloor: - continue; - default: - break; - } - } - s->uses_fragcoord_xy_as_float = true; - break; - } - break; - case nir_intrinsic_load_sample_pos: - if (!s->options->frag_coord_is_center) - s->uses_fragcoord_xy_as_float = true; - break; default: break; } @@ -592,17 +539,6 @@ ac_nir_lower_ps_early(nir_shader *nir, const ac_nir_lower_ps_early_options *opti /* Don't gather shader_info. Just gather the single thing we want to know. */ nir_shader_intrinsics_pass(nir, gather_info, nir_metadata_all, &state); - /* The preferred option is replacing frag_coord by pixel_coord.xy + 0.5. The goal is to reduce - * input VGPRs to increase PS wave launch rate. pixel_coord uses 1 input VGPR, while - * frag_coord.xy uses 2 input VGPRs. It only helps performance if the number of input VGPRs - * decreases to an even number. If it only decreases to an odd number, it has no effect. - * - * TODO: estimate input VGPRs and don't lower to pixel_coord if their number doesn't decrease to - * an even number? - */ - state.use_fragcoord = !options->frag_coord_is_center && state.options->ps_iter_samples != 1 && - !state.options->msaa_disabled && state.uses_fragcoord_xy_as_float; - bool progress = nir_shader_intrinsics_pass(nir, lower_ps_intrinsic, nir_metadata_control_flow, &state); diff --git a/src/gallium/drivers/radeonsi/gfx/si_shader.c b/src/gallium/drivers/radeonsi/gfx/si_shader.c index 8afb487640d..f354079c704 100644 --- a/src/gallium/drivers/radeonsi/gfx/si_shader.c +++ b/src/gallium/drivers/radeonsi/gfx/si_shader.c @@ -849,7 +849,6 @@ static void si_preprocess_nir(struct si_nir_shader_ctx *ctx) key->ps.mono.interpolate_at_sample_force_center, .load_sample_positions_always_loads_current_ones = true, .force_front_face = key->ps.opt.force_front_face_input, - .optimize_frag_coord = true, .frag_coord_is_center = true, /* This does a lot of things. See the description in ac_nir_lower_ps_early_options. */ .ps_iter_samples = nir->info.fs.uses_sample_shading ? 8 : @@ -889,7 +888,6 @@ static void si_preprocess_nir(struct si_nir_shader_ctx *ctx) NIR_PASS(progress, nir, si_nir_lower_polygon_stipple); } else { ac_nir_lower_ps_early_options early_options = { - .optimize_frag_coord = true, .frag_coord_is_center = true, .ps_iter_samples = nir->info.fs.uses_sample_shading ? 8 : 0, .lower_color_inputs_to_load_color01 = true, @@ -1753,8 +1751,6 @@ static void si_get_ps_prolog_key(struct si_shader *shader, union si_shader_part_ key->ps_prolog.reserve_line_stipple_tex_ena = G_0286CC_LINE_STIPPLE_TEX_ENA(shader->config.spi_ps_input_addr); /* unused but may need to be reserved */ key->ps_prolog.fragcoord_usage_mask = - G_0286CC_POS_X_FLOAT_ENA(shader->config.spi_ps_input_ena) | - (G_0286CC_POS_Y_FLOAT_ENA(shader->config.spi_ps_input_ena) << 1) | (G_0286CC_POS_Z_FLOAT_ENA(shader->config.spi_ps_input_ena) << 2) | (G_0286CC_POS_W_FLOAT_ENA(shader->config.spi_ps_input_ena) << 3); key->ps_prolog.uses_ancillary = diff --git a/src/gallium/drivers/radeonsi/gfx/si_shader_info.c b/src/gallium/drivers/radeonsi/gfx/si_shader_info.c index 48a510e038f..eab603db5ce 100644 --- a/src/gallium/drivers/radeonsi/gfx/si_shader_info.c +++ b/src/gallium/drivers/radeonsi/gfx/si_shader_info.c @@ -646,7 +646,6 @@ void si_nir_gather_info(struct si_screen *sscreen, struct nir_shader *nir, info->uses_interp_at_sample || nir->info.writes_memory || nir->info.fs.uses_fbfetch_output || nir->info.fs.needs_coarse_quad_helper_invocations || - BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRAG_COORD_XY) || BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRAG_COORD_Z) || BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRAG_COORD_W_RCP) || BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_PIXEL_COORD) || diff --git a/src/gallium/drivers/radeonsi/gfx/si_shader_variant_info.c b/src/gallium/drivers/radeonsi/gfx/si_shader_variant_info.c index 8efe0405d52..34016b239e1 100644 --- a/src/gallium/drivers/radeonsi/gfx/si_shader_variant_info.c +++ b/src/gallium/drivers/radeonsi/gfx/si_shader_variant_info.c @@ -161,9 +161,6 @@ void si_get_shader_variant_info(struct si_shader *shader, case nir_intrinsic_load_draw_id: shader->info.uses_sysval_draw_id = true; break; - case nir_intrinsic_load_frag_coord_xy: - frag_coord_mask |= nir_def_components_read(&intr->def); - break; case nir_intrinsic_load_frag_coord_z: frag_coord_mask |= BITFIELD_BIT(2); break; @@ -374,8 +371,6 @@ void si_get_shader_variant_info(struct si_shader *shader, S_0286CC_LINEAR_SAMPLE_ENA(BITSET_TEST(sysvals, SYSTEM_VALUE_BARYCENTRIC_LINEAR_SAMPLE)) | S_0286CC_LINEAR_CENTER_ENA(BITSET_TEST(sysvals, SYSTEM_VALUE_BARYCENTRIC_LINEAR_PIXEL)) | S_0286CC_LINEAR_CENTROID_ENA(BITSET_TEST(sysvals, SYSTEM_VALUE_BARYCENTRIC_LINEAR_CENTROID)) | - S_0286CC_POS_X_FLOAT_ENA(!!(frag_coord_mask & 0x1)) | - S_0286CC_POS_Y_FLOAT_ENA(!!(frag_coord_mask & 0x2)) | S_0286CC_POS_Z_FLOAT_ENA(!!(frag_coord_mask & 0x4)) | S_0286CC_POS_W_FLOAT_ENA(!!(frag_coord_mask & 0x8)) | S_0286CC_FRONT_FACE_ENA(BITSET_TEST(sysvals, SYSTEM_VALUE_FRONT_FACE) |