From 8a43b1e7da907c135953214de84126da4fcbd387 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Wed, 28 Aug 2024 16:01:36 +0200 Subject: [PATCH] aco/ra: do not reuse killed vcc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit VCC should only be used if nessecary, to keep it free for instructions that need/prefer it. Foz-DB Navi31: Totals from 132 (0.17% of 79395) affected shaders: Instrs: 832538 -> 832608 (+0.01%); split: -0.03%, +0.04% CodeSize: 4310888 -> 4301792 (-0.21%); split: -0.22%, +0.01% Latency: 6238465 -> 6239198 (+0.01%); split: -0.04%, +0.05% InvThroughput: 5332353 -> 5336363 (+0.08%); split: -0.03%, +0.10% Copies: 59420 -> 59392 (-0.05%); split: -0.11%, +0.06% VALU: 459318 -> 459187 (-0.03%); split: -0.03%, +0.00% SALU: 109208 -> 109081 (-0.12%); split: -0.14%, +0.03% VOPD: 6426 -> 6557 (+2.04%); split: +2.10%, -0.06% Foz-DB Navi21: Totals from 386 (0.49% of 79395) affected shaders: Instrs: 3254046 -> 3252423 (-0.05%); split: -0.05%, +0.00% CodeSize: 17839104 -> 17680580 (-0.89%); split: -0.89%, +0.00% Latency: 24424322 -> 24426242 (+0.01%); split: -0.01%, +0.01% InvThroughput: 10140681 -> 10143882 (+0.03%); split: -0.01%, +0.04% SClause: 80731 -> 80738 (+0.01%); split: -0.01%, +0.02% Copies: 293719 -> 293593 (-0.04%); split: -0.27%, +0.23% Branches: 126625 -> 126626 (+0.00%); split: -0.00%, +0.00% VALU: 2086026 -> 2086029 (+0.00%) SALU: 502641 -> 501012 (-0.32%); split: -0.33%, +0.00% Reviewed-by: Daniel Schürmann Part-of: --- src/amd/compiler/aco_register_allocation.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 017741f96b9..4a2fdc25404 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -1769,6 +1769,8 @@ get_reg(ra_ctx& ctx, const RegisterFile& reg_file, Temp temp, for (const Operand& op : instr->operands) { if (op.isTemp() && op.isFirstKillBeforeDef() && op.regClass() == temp.regClass()) { assert(op.isFixed()); + if (op.physReg() == vcc || op.physReg() == vcc_hi) + continue; if (get_reg_specified(ctx, reg_file, temp.regClass(), instr, op.physReg(), operand_index)) return op.physReg();