From 89e679803ba202c87fdf9130bc4ba6bab24447e6 Mon Sep 17 00:00:00 2001
From: Kenneth Graunke <kenneth@whitecape.org>
Date: Mon, 9 Jan 2023 15:57:14 -0800
Subject: [PATCH] intel/compiler: Drop redundant 32-bit expansion for shared
 float atomics

We already expanded data to 32-bit a few lines earlier, so this is just
redundantly doing it a second time.

Fixes: 43169dbbe5f ("intel/compiler: Support 16 bit float ops")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20604>
(cherry picked from commit f7b29d792464b0224ae5155d15d48ab8e55840cb)
---
 .pick_status.json                 | 2 +-
 src/intel/compiler/brw_fs_nir.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index ee16722166b..e5073f0beb2 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -3010,7 +3010,7 @@
         "description": "intel/compiler: Drop redundant 32-bit expansion for shared float atomics",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "43169dbbe5f963ca47d51873f6639fbe3fd665b0"
     },
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index ca5d2bc13fc..769077473c7 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -6109,7 +6109,7 @@ fs_visitor::nir_emit_shared_atomic(const fs_builder &bld,
    if (op == BRW_AOP_CMPWR) {
       fs_reg tmp = bld.vgrf(data.type, 2);
       fs_reg sources[2] = {
-         expand_to_32bit(bld, data),
+         data,
          expand_to_32bit(bld, get_nir_src(instr->src[2]))
       };
       bld.LOAD_PAYLOAD(tmp, sources, 2, 0);