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turnip: Rename lrz force_disable_mask
Prep to use it to communicate more than just force-disable cases. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20708>
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0e1bdd0057
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3 changed files with 10 additions and 10 deletions
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@ -589,7 +589,7 @@ tu6_calculate_lrz_state(struct tu_cmd_buffer *cmd,
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gras_lrz_cntl.enable = true;
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gras_lrz_cntl.lrz_write =
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z_write_enable &&
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!(pipeline->lrz.force_disable_mask & TU_LRZ_FORCE_DISABLE_WRITE);
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!(pipeline->lrz.lrz_status & TU_LRZ_FORCE_DISABLE_WRITE);
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gras_lrz_cntl.z_test_enable = z_write_enable;
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gras_lrz_cntl.z_bounds_enable = z_bounds_enable;
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gras_lrz_cntl.fc_enable = cmd->state.lrz.fast_clear;
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@ -661,7 +661,7 @@ tu6_calculate_lrz_state(struct tu_cmd_buffer *cmd,
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* fragment tests. We have to skip LRZ testing and updating, but as long as
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* the depth direction stayed the same we can continue with LRZ testing later.
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*/
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if (pipeline->lrz.force_disable_mask & TU_LRZ_FORCE_DISABLE_LRZ) {
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if (pipeline->lrz.lrz_status & TU_LRZ_FORCE_DISABLE_LRZ) {
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if (cmd->state.lrz.prev_direction != TU_LRZ_UNKNOWN || !cmd->state.lrz.gpu_dir_tracking) {
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perf_debug(cmd->device, "Skipping LRZ due to FS");
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temporary_disable_lrz = true;
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@ -3889,7 +3889,7 @@ tu_pipeline_builder_parse_libraries(struct tu_pipeline_builder *builder,
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VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT) {
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pipeline->ds = library->ds;
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pipeline->lrz.fs = library->lrz.fs;
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pipeline->lrz.force_disable_mask |= library->lrz.force_disable_mask;
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pipeline->lrz.lrz_status |= library->lrz.lrz_status;
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pipeline->lrz.force_late_z |= library->lrz.force_late_z;
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library_dynamic_state |=
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BIT(VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK) |
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@ -3905,7 +3905,7 @@ tu_pipeline_builder_parse_libraries(struct tu_pipeline_builder *builder,
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VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_OUTPUT_INTERFACE_BIT_EXT) {
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pipeline->blend = library->blend;
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pipeline->output = library->output;
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pipeline->lrz.force_disable_mask |= library->lrz.force_disable_mask;
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pipeline->lrz.lrz_status |= library->lrz.lrz_status;
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pipeline->lrz.force_late_z |= library->lrz.force_late_z;
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pipeline->prim_order = library->prim_order;
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library_dynamic_state |=
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@ -4450,10 +4450,10 @@ tu_pipeline_builder_parse_depth_stencil(struct tu_pipeline_builder *builder,
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if (builder->variants[MESA_SHADER_FRAGMENT]) {
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const struct ir3_shader_variant *fs = builder->variants[MESA_SHADER_FRAGMENT];
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if (fs->has_kill) {
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pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
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pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
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}
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if (fs->no_earlyz || fs->writes_pos) {
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pipeline->lrz.force_disable_mask = TU_LRZ_FORCE_DISABLE_LRZ;
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pipeline->lrz.lrz_status = TU_LRZ_FORCE_DISABLE_LRZ;
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}
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}
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}
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@ -4600,13 +4600,13 @@ tu_pipeline_builder_parse_multisample_and_color_blend(
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!(pipeline->dynamic_state_mask &
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(BIT(TU_DYNAMIC_STATE_LOGIC_OP) |
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BIT(TU_DYNAMIC_STATE_BLEND_ENABLE))))
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pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
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pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
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if (!(pipeline->dynamic_state_mask &
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BIT(TU_DYNAMIC_STATE_COLOR_WRITE_ENABLE)) &&
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(pipeline->blend.color_write_enable & MASK(pipeline->blend.num_rts)) !=
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MASK(pipeline->blend.num_rts))
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pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
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pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
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if (!(pipeline->dynamic_state_mask & BIT(TU_DYNAMIC_STATE_BLEND))) {
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for (int i = 0; i < blend_info->attachmentCount; i++) {
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@ -4619,7 +4619,7 @@ tu_pipeline_builder_parse_multisample_and_color_blend(
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unsigned mask = MASK(vk_format_get_nr_components(format));
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if (format != VK_FORMAT_UNDEFINED &&
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(blendAttachment.colorWriteMask & mask) != mask) {
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pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
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pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
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}
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}
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}
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@ -55,7 +55,7 @@ struct cache_entry;
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struct tu_lrz_pipeline
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{
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uint32_t force_disable_mask;
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uint32_t lrz_status;
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struct {
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bool has_kill;
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