turnip: Rename lrz force_disable_mask

Prep to use it to communicate more than just force-disable cases.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20708>
This commit is contained in:
Rob Clark 2023-01-17 08:41:54 -08:00 committed by Marge Bot
parent 0e1bdd0057
commit 899f2218fe
3 changed files with 10 additions and 10 deletions

View file

@ -589,7 +589,7 @@ tu6_calculate_lrz_state(struct tu_cmd_buffer *cmd,
gras_lrz_cntl.enable = true;
gras_lrz_cntl.lrz_write =
z_write_enable &&
!(pipeline->lrz.force_disable_mask & TU_LRZ_FORCE_DISABLE_WRITE);
!(pipeline->lrz.lrz_status & TU_LRZ_FORCE_DISABLE_WRITE);
gras_lrz_cntl.z_test_enable = z_write_enable;
gras_lrz_cntl.z_bounds_enable = z_bounds_enable;
gras_lrz_cntl.fc_enable = cmd->state.lrz.fast_clear;
@ -661,7 +661,7 @@ tu6_calculate_lrz_state(struct tu_cmd_buffer *cmd,
* fragment tests. We have to skip LRZ testing and updating, but as long as
* the depth direction stayed the same we can continue with LRZ testing later.
*/
if (pipeline->lrz.force_disable_mask & TU_LRZ_FORCE_DISABLE_LRZ) {
if (pipeline->lrz.lrz_status & TU_LRZ_FORCE_DISABLE_LRZ) {
if (cmd->state.lrz.prev_direction != TU_LRZ_UNKNOWN || !cmd->state.lrz.gpu_dir_tracking) {
perf_debug(cmd->device, "Skipping LRZ due to FS");
temporary_disable_lrz = true;

View file

@ -3889,7 +3889,7 @@ tu_pipeline_builder_parse_libraries(struct tu_pipeline_builder *builder,
VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT) {
pipeline->ds = library->ds;
pipeline->lrz.fs = library->lrz.fs;
pipeline->lrz.force_disable_mask |= library->lrz.force_disable_mask;
pipeline->lrz.lrz_status |= library->lrz.lrz_status;
pipeline->lrz.force_late_z |= library->lrz.force_late_z;
library_dynamic_state |=
BIT(VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK) |
@ -3905,7 +3905,7 @@ tu_pipeline_builder_parse_libraries(struct tu_pipeline_builder *builder,
VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_OUTPUT_INTERFACE_BIT_EXT) {
pipeline->blend = library->blend;
pipeline->output = library->output;
pipeline->lrz.force_disable_mask |= library->lrz.force_disable_mask;
pipeline->lrz.lrz_status |= library->lrz.lrz_status;
pipeline->lrz.force_late_z |= library->lrz.force_late_z;
pipeline->prim_order = library->prim_order;
library_dynamic_state |=
@ -4450,10 +4450,10 @@ tu_pipeline_builder_parse_depth_stencil(struct tu_pipeline_builder *builder,
if (builder->variants[MESA_SHADER_FRAGMENT]) {
const struct ir3_shader_variant *fs = builder->variants[MESA_SHADER_FRAGMENT];
if (fs->has_kill) {
pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
}
if (fs->no_earlyz || fs->writes_pos) {
pipeline->lrz.force_disable_mask = TU_LRZ_FORCE_DISABLE_LRZ;
pipeline->lrz.lrz_status = TU_LRZ_FORCE_DISABLE_LRZ;
}
}
}
@ -4600,13 +4600,13 @@ tu_pipeline_builder_parse_multisample_and_color_blend(
!(pipeline->dynamic_state_mask &
(BIT(TU_DYNAMIC_STATE_LOGIC_OP) |
BIT(TU_DYNAMIC_STATE_BLEND_ENABLE))))
pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
if (!(pipeline->dynamic_state_mask &
BIT(TU_DYNAMIC_STATE_COLOR_WRITE_ENABLE)) &&
(pipeline->blend.color_write_enable & MASK(pipeline->blend.num_rts)) !=
MASK(pipeline->blend.num_rts))
pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
if (!(pipeline->dynamic_state_mask & BIT(TU_DYNAMIC_STATE_BLEND))) {
for (int i = 0; i < blend_info->attachmentCount; i++) {
@ -4619,7 +4619,7 @@ tu_pipeline_builder_parse_multisample_and_color_blend(
unsigned mask = MASK(vk_format_get_nr_components(format));
if (format != VK_FORMAT_UNDEFINED &&
(blendAttachment.colorWriteMask & mask) != mask) {
pipeline->lrz.force_disable_mask |= TU_LRZ_FORCE_DISABLE_WRITE;
pipeline->lrz.lrz_status |= TU_LRZ_FORCE_DISABLE_WRITE;
}
}
}

View file

@ -55,7 +55,7 @@ struct cache_entry;
struct tu_lrz_pipeline
{
uint32_t force_disable_mask;
uint32_t lrz_status;
struct {
bool has_kill;