From 896dc63623bf19a6260d2ec0dd51cd0ab271bb17 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 18 May 2022 09:42:41 -0400 Subject: [PATCH] pan/bi: Lower phis to scalar If we don't lower phis to scalar, when we go out of SSA, we can get vector nir_registers. In particular, we can get code like: r0 = vec2 r0.y, r0.x This code looks like a move, but is in fact a swap. The trivial lowering of vec2 would not work -- the following fails to swap correctly: r0.x = r0.y r0.y = r0.x Currently, we generate temporaries to handle these cases. It's easy to move the complexity to NIR, though, and we'll want to scalarize phis for SSA-based RA anyway. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/panfrost/bifrost/bifrost_compile.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c index c48591e829f..e338c5e7185 100644 --- a/src/panfrost/bifrost/bifrost_compile.c +++ b/src/panfrost/bifrost/bifrost_compile.c @@ -4256,6 +4256,7 @@ bi_optimize_nir(nir_shader *nir, unsigned gpu_id, bool is_blend) } NIR_PASS(progress, nir, nir_lower_alu_to_scalar, bi_scalarize_filter, NULL); + NIR_PASS(progress, nir, nir_lower_phis_to_scalar, true); NIR_PASS(progress, nir, nir_opt_vectorize, bi_vectorize_filter, NULL); NIR_PASS(progress, nir, nir_lower_bool_to_bitsize);