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r600g: add sin/cos
This pretty much ports the code from r600c, however it doesn't always seem to work quite perfectly, but I can't find anything in this code that is wrong. I'm guessing either literal input or constants aren't working always.
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parent
098064e8cb
commit
88f5976484
2 changed files with 123 additions and 2 deletions
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@ -674,6 +674,126 @@ static int tgsi_op2(struct r600_shader_ctx *ctx)
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return 0;
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}
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/*
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* r600 - trunc to -PI..PI range
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* r700 - normalize by dividing by 2PI
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* see fdo bug 27901
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*/
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static int tgsi_trig(struct r600_shader_ctx *ctx)
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{
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struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
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struct r600_bc_alu_src r600_src[3];
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struct r600_bc_alu alu;
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int i, r;
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uint32_t lit_vals[4];
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memset(lit_vals, 0, 4*4);
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r = tgsi_split_constant(ctx, r600_src);
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if (r)
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return r;
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lit_vals[0] = fui(1.0 /(3.1415926535 * 2));
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lit_vals[1] = fui(0.5f);
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memset(&alu, 0, sizeof(struct r600_bc_alu));
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alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
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alu.is_op3 = 1;
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alu.dst.chan = 0;
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alu.dst.sel = ctx->temp_reg;
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alu.dst.write = 1;
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alu.src[0] = r600_src[0];
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alu.src[0].chan = tgsi_chan(&inst->Src[0], 0);
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alu.src[1].sel = SQ_ALU_SRC_LITERAL;
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alu.src[1].chan = 0;
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alu.src[2].sel = SQ_ALU_SRC_LITERAL;
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alu.src[2].chan = 1;
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alu.last = 1;
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r = r600_bc_add_alu(ctx->bc, &alu);
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if (r)
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return r;
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r = r600_bc_add_literal(ctx->bc, lit_vals);
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if (r)
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return r;
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memset(&alu, 0, sizeof(struct r600_bc_alu));
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alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT;
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alu.dst.chan = 0;
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alu.dst.sel = ctx->temp_reg;
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alu.dst.write = 1;
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alu.src[0].sel = ctx->temp_reg;
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alu.src[0].chan = 0;
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alu.last = 1;
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r = r600_bc_add_alu(ctx->bc, &alu);
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if (r)
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return r;
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if (ctx->bc->chiprev == 0) {
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lit_vals[0] = fui(3.1415926535897f * 2.0f);
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lit_vals[1] = fui(-3.1415926535897f);
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} else {
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lit_vals[0] = fui(1.0f);
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lit_vals[1] = fui(-0.5f);
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}
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memset(&alu, 0, sizeof(struct r600_bc_alu));
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alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
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alu.is_op3 = 1;
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alu.dst.chan = 0;
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alu.dst.sel = ctx->temp_reg;
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alu.dst.write = 1;
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alu.src[0].sel = ctx->temp_reg;
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alu.src[0].chan = 0;
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alu.src[1].sel = SQ_ALU_SRC_LITERAL;
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alu.src[1].chan = 0;
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alu.src[2].sel = SQ_ALU_SRC_LITERAL;
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alu.src[2].chan = 1;
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alu.last = 1;
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r = r600_bc_add_alu(ctx->bc, &alu);
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if (r)
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return r;
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r = r600_bc_add_literal(ctx->bc, lit_vals);
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if (r)
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return r;
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memset(&alu, 0, sizeof(struct r600_bc_alu));
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alu.inst = ctx->inst_info->r600_opcode;
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alu.dst.chan = 0;
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alu.dst.sel = ctx->temp_reg;
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alu.dst.write = 1;
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alu.src[0].sel = ctx->temp_reg;
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alu.src[0].chan = 0;
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alu.last = 1;
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r = r600_bc_add_alu(ctx->bc, &alu);
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if (r)
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return r;
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/* replicate result */
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for (i = 0; i < 4; i++) {
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memset(&alu, 0, sizeof(struct r600_bc_alu));
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alu.src[0].sel = ctx->temp_reg;
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alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
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alu.dst.chan = i;
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r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
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if (r)
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return r;
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alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1;
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if (i == 3)
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alu.last = 1;
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r = r600_bc_add_alu(ctx->bc, &alu);
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if (r)
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return r;
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}
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return 0;
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}
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static int tgsi_kill(struct r600_shader_ctx *ctx)
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{
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struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
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@ -1300,7 +1420,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
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{TGSI_OPCODE_ABS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2},
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{TGSI_OPCODE_RCC, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
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{TGSI_OPCODE_DPH, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
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{TGSI_OPCODE_COS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
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{TGSI_OPCODE_COS, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS, tgsi_trig},
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{TGSI_OPCODE_DDX, 0, SQ_TEX_INST_GET_GRADIENTS_H, tgsi_tex},
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{TGSI_OPCODE_DDY, 0, SQ_TEX_INST_GET_GRADIENTS_V, tgsi_tex},
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{TGSI_OPCODE_KILP, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, /* predicated kill */
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@ -1312,7 +1432,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
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{TGSI_OPCODE_SEQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2},
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{TGSI_OPCODE_SFL, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
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{TGSI_OPCODE_SGT, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT, tgsi_op2},
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{TGSI_OPCODE_SIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
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{TGSI_OPCODE_SIN, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN, tgsi_trig},
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{TGSI_OPCODE_SLE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE, tgsi_slt},
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{TGSI_OPCODE_SNE, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE, tgsi_op2},
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{TGSI_OPCODE_STR, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported},
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@ -598,5 +598,6 @@
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#define SQ_ALU_SRC_1_INT 250
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#define SQ_ALU_SRC_M_1_INT 251
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#define SQ_ALU_SRC_0_5 252
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#define SQ_ALU_SRC_LITERAL 253
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#endif
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