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radeon/uvd: enable 10bit HEVC decode v2

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Just use whatever the state tracker allocated.

v2: fix msb mode

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Mark Thompson <sw@jkqxz.net>
This commit is contained in:
Christian König 2017-01-16 15:04:47 +01:00
parent 3e1e441aa0
commit 88f3451083
2 changed files with 20 additions and 8 deletions
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17
src/gallium/drivers/radeon/radeon_uvd.c
View file

@ -704,13 +704,16 @@ static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video
result.direct_reflist[i][j] = pic->RefPicList[i][j];
}
if ((pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) &&
(target->buffer_format == PIPE_FORMAT_NV12)) {
result.p010_mode = 0;
result.luma_10to8 = 5;
result.chroma_10to8 = 5;
result.sclr_luma10to8 = 4;
result.sclr_chroma10to8 = 4;
if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
if (target->buffer_format == PIPE_FORMAT_P016) {
result.p010_mode = 1;
result.msb_mode = 1;
} else {
result.luma_10to8 = 5;
result.chroma_10to8 = 5;
result.sclr_luma10to8 = 4;
result.sclr_chroma10to8 = 4;
}
}
/* TODO

11
src/gallium/drivers/radeon/radeon_video.c
View file

@ -279,7 +279,11 @@ int rvid_get_video_param(struct pipe_screen *screen,
case PIPE_VIDEO_CAP_MAX_HEIGHT:
return (rscreen->family < CHIP_TONGA) ? 1152 : 4096;
case PIPE_VIDEO_CAP_PREFERED_FORMAT:
return PIPE_FORMAT_NV12;
if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
return PIPE_FORMAT_P016;
else
return PIPE_FORMAT_NV12;
case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
if (rscreen->family < CHIP_PALM) {
@ -331,6 +335,11 @@ boolean rvid_is_format_supported(struct pipe_screen *screen,
enum pipe_video_profile profile,
enum pipe_video_entrypoint entrypoint)
{
/* HEVC 10 bit decoding should use P016 instead of NV12 if possible */
if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
return (format == PIPE_FORMAT_NV12) ||
(format == PIPE_FORMAT_P016);
/* we can only handle this one with UVD */
if (profile != PIPE_VIDEO_PROFILE_UNKNOWN)
return format == PIPE_FORMAT_NV12;