fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-02-05 14:50:26 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 5

nir: Support Intel URB intrinsics in nir_opt_offsets

Browse source 
We don't bother with maximums or wrapping because it shouldn't come up
for IO intrinsics anyway.

fossil-db results on Battlemage:

   Instrs: 231363032 -> 231359554 (-0.00%)
   Cycle count: 34057005552.0 -> 34057236190.0 (+0.00%); split: -0.00%, +0.00%
   Max live registers: 71873886 -> 71870438 (-0.00%)
   Non SSA regs after NIR: 67159408 -> 67159523 (+0.00%)

   Totals from 1779 (0.23% of 788851) affected shaders:
   Instrs: 774359 -> 770881 (-0.45%)
   Cycle count: 10551280.0 -> 10781918.0 (+2.19%); split: -0.32%, +2.51%
   Max live registers: 158193 -> 154745 (-2.18%)
   Non SSA regs after NIR: 180104 -> 180219 (+0.06%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38918>
This commit is contained in:
Kenneth Graunke 2025-12-09 03:21:04 -08:00 • committed by Marge Bot
parent d831f38d11
commit 88d46605bd
1 changed files with 7 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
src/compiler/nir/nir_opt_offsets.c
View file

@ -291,6 +291,13 @@ process_instr(nir_builder *b, nir_instr *instr, void *s)
return try_fold_load_store(b, intrin, state, 2, get_max(state, intrin, state->options->buffer_max), need_nuw);
case nir_intrinsic_store_ssbo_ir3:
return try_fold_load_store(b, intrin, state, 3, get_max(state, intrin, state->options->buffer_max), need_nuw);
case nir_intrinsic_load_urb_lsc_intel:
return try_fold_load_store(b, intrin, state, 0, UINT32_MAX, false);
case nir_intrinsic_store_urb_lsc_intel:
case nir_intrinsic_load_urb_vec4_intel:
return try_fold_load_store(b, intrin, state, 1, UINT32_MAX, false);
case nir_intrinsic_store_urb_vec4_intel:
return try_fold_load_store(b, intrin, state, 2, UINT32_MAX, false);
default:
return false;
}