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radeonsi: determine secure flag must be set for gfx IB
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401>
This commit is contained in:
parent
92e64f4b41
commit
8873ea0e25
6 changed files with 147 additions and 1 deletions
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@ -806,6 +806,15 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info
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si_need_gfx_cs_space(sctx);
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/* If we're using a secure context, determine if cs must be secure or not */
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if (unlikely(sctx->ws->ws_is_secure(sctx->ws))) {
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bool secure = si_compute_resources_check_encrypted(sctx);
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if (secure != sctx->ws->cs_is_secure(sctx->gfx_cs)) {
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si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
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sctx->ws->cs_set_secure(sctx->gfx_cs, secure);
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}
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}
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if (sctx->bo_list_add_all_compute_resources)
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si_compute_resources_add_all_to_bo_list(sctx);
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@ -336,6 +336,17 @@ void si_cp_dma_copy_buffer(struct si_context *sctx, struct pipe_resource *dst,
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}
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}
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/* TMZ handling */
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if (unlikely(sctx->ws->ws_is_secure(sctx->ws) &&
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!(user_flags & SI_CPDMA_SKIP_TMZ))) {
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bool secure = src && (si_resource(src)->flags & RADEON_FLAG_ENCRYPTED);
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assert(!secure || (!dst || (si_resource(dst)->flags & RADEON_FLAG_ENCRYPTED)));
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if (secure != sctx->ws->cs_is_secure(sctx->gfx_cs)) {
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si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
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sctx->ws->cs_set_secure(sctx->gfx_cs, secure);
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}
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}
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/* Flush the caches. */
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if ((dst || src) && !(user_flags & SI_CPDMA_SKIP_GFX_SYNC)) {
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sctx->flags |= SI_CONTEXT_PS_PARTIAL_FLUSH | SI_CONTEXT_CS_PARTIAL_FLUSH |
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@ -54,6 +54,7 @@
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*/
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#include "si_pipe.h"
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#include "si_compute.h"
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#include "sid.h"
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#include "util/format/u_format.h"
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#include "util/hash_table.h"
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@ -256,6 +257,23 @@ static void si_sampler_views_begin_new_cs(struct si_context *sctx, struct si_sam
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}
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}
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static bool si_sampler_views_check_encrypted(struct si_context *sctx, struct si_samplers *samplers,
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unsigned samplers_declared)
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{
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unsigned mask = samplers->enabled_mask & samplers_declared;
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/* Verify if a samplers uses an encrypted resource */
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while (mask) {
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int i = u_bit_scan(&mask);
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struct si_sampler_view *sview = (struct si_sampler_view *)samplers->views[i];
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struct si_resource *res = si_resource(sview->base.texture);
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if (res->flags & RADEON_FLAG_ENCRYPTED)
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return true;
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}
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return false;
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}
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/* Set buffer descriptor fields that can be changed by reallocations. */
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static void si_set_buf_desc_address(struct si_resource *buf, uint64_t offset, uint32_t *state)
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{
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@ -609,6 +627,24 @@ static void si_image_views_begin_new_cs(struct si_context *sctx, struct si_image
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}
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}
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static bool si_image_views_check_encrypted(struct si_context *sctx, struct si_images *images,
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unsigned images_declared)
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{
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uint mask = images->enabled_mask & images_declared;
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while (mask) {
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int i = u_bit_scan(&mask);
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struct pipe_image_view *view = &images->views[i];
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assert(view->resource);
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struct si_texture *tex = (struct si_texture *)view->resource;
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if (tex->buffer.flags & RADEON_FLAG_ENCRYPTED)
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return true;
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}
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return false;
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}
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static void si_disable_shader_image(struct si_context *ctx, unsigned shader, unsigned slot)
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{
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struct si_images *images = &ctx->images[shader];
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@ -955,6 +991,23 @@ static void si_buffer_resources_begin_new_cs(struct si_context *sctx,
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}
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}
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static bool si_buffer_resources_check_encrypted(struct si_context *sctx,
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struct si_buffer_resources *buffers)
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{
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unsigned mask = buffers->enabled_mask;
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while (mask) {
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int i = u_bit_scan(&mask);
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/* only check for reads */
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if ((buffers->writable_mask & (1u << i)) == 0 &&
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(si_resource(buffers->buffers[i])->flags & RADEON_FLAG_ENCRYPTED))
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return true;
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}
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return false;
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}
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static void si_get_buffer_from_descriptors(struct si_buffer_resources *buffers,
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struct si_descriptors *descs, unsigned idx,
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struct pipe_resource **buf, unsigned *offset,
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@ -2655,6 +2708,52 @@ void si_release_all_descriptors(struct si_context *sctx)
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si_release_bindless_descriptors(sctx);
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}
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bool si_gfx_resources_check_encrypted(struct si_context *sctx)
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{
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bool use_encrypted_bo = false;
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struct si_shader_ctx_state *current_shader[SI_NUM_SHADERS] = {
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[PIPE_SHADER_VERTEX] = &sctx->vs_shader,
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[PIPE_SHADER_TESS_CTRL] = &sctx->tcs_shader,
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[PIPE_SHADER_TESS_EVAL] = &sctx->tes_shader,
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[PIPE_SHADER_GEOMETRY] = &sctx->gs_shader,
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[PIPE_SHADER_FRAGMENT] = &sctx->ps_shader,
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};
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for (unsigned i = 0; i < SI_NUM_GRAPHICS_SHADERS && !use_encrypted_bo; i++) {
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if (!current_shader[i]->cso)
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continue;
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use_encrypted_bo |=
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si_buffer_resources_check_encrypted(sctx, &sctx->const_and_shader_buffers[i]);
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use_encrypted_bo |=
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si_sampler_views_check_encrypted(sctx, &sctx->samplers[i],
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current_shader[i]->cso->info.samplers_declared);
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use_encrypted_bo |= si_image_views_check_encrypted(sctx, &sctx->images[i],
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current_shader[i]->cso->info.images_declared);
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}
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use_encrypted_bo |= si_buffer_resources_check_encrypted(sctx, &sctx->rw_buffers);
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struct si_state_blend *blend = sctx->queued.named.blend;
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for (int i = 0; i < sctx->framebuffer.state.nr_cbufs && !use_encrypted_bo; i++) {
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struct pipe_surface *surf = sctx->framebuffer.state.cbufs[i];
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if (surf && surf->texture) {
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struct si_texture *tex = (struct si_texture *)surf->texture;
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if (!(tex->buffer.flags & RADEON_FLAG_ENCRYPTED))
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continue;
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/* Are we reading from this framebuffer (blend) */
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if ((blend->blend_enable_4bit >> (4 * i)) & 0xf) {
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/* TODO: blend op */
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use_encrypted_bo = true;
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}
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}
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}
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/* TODO: we should assert that either use_encrypted_bo is false,
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* or all writable buffers are encrypted.
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*/
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return use_encrypted_bo;
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}
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void si_gfx_resources_add_all_to_bo_list(struct si_context *sctx)
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{
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for (unsigned i = 0; i < SI_NUM_GRAPHICS_SHADERS; i++) {
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@ -2672,6 +2771,21 @@ void si_gfx_resources_add_all_to_bo_list(struct si_context *sctx)
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sctx->bo_list_add_all_gfx_resources = false;
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}
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bool si_compute_resources_check_encrypted(struct si_context *sctx)
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{
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unsigned sh = PIPE_SHADER_COMPUTE;
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struct si_shader_info* info = &sctx->cs_shader_state.program->sel.info;
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/* TODO: we should assert that either use_encrypted_bo is false,
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* or all writable buffers are encrypted.
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*/
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return si_buffer_resources_check_encrypted(sctx, &sctx->const_and_shader_buffers[sh]) ||
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si_sampler_views_check_encrypted(sctx, &sctx->samplers[sh], info->samplers_declared) ||
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si_image_views_check_encrypted(sctx, &sctx->images[sh], info->images_declared) ||
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si_buffer_resources_check_encrypted(sctx, &sctx->rw_buffers);
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}
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void si_compute_resources_add_all_to_bo_list(struct si_context *sctx)
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{
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unsigned sh = PIPE_SHADER_COMPUTE;
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@ -1336,9 +1336,10 @@ void si_init_compute_blit_functions(struct si_context *sctx);
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#define SI_CPDMA_SKIP_SYNC_BEFORE (1 << 2) /* don't wait for DMA before the copy (RAW hazards) */
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#define SI_CPDMA_SKIP_GFX_SYNC (1 << 3) /* don't flush caches and don't wait for PS/CS */
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#define SI_CPDMA_SKIP_BO_LIST_UPDATE (1 << 4) /* don't update the BO list */
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#define SI_CPDMA_SKIP_TMZ (1 << 5) /* don't update tmz state */
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#define SI_CPDMA_SKIP_ALL \
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(SI_CPDMA_SKIP_CHECK_CS_SPACE | SI_CPDMA_SKIP_SYNC_AFTER | SI_CPDMA_SKIP_SYNC_BEFORE | \
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SI_CPDMA_SKIP_GFX_SYNC | SI_CPDMA_SKIP_BO_LIST_UPDATE)
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SI_CPDMA_SKIP_GFX_SYNC | SI_CPDMA_SKIP_BO_LIST_UPDATE | SI_CPDMA_SKIP_TMZ)
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void si_cp_dma_wait_for_idle(struct si_context *sctx);
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void si_cp_dma_clear_buffer(struct si_context *sctx, struct radeon_cmdbuf *cs,
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@ -501,6 +501,8 @@ bool si_upload_compute_shader_descriptors(struct si_context *sctx);
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void si_release_all_descriptors(struct si_context *sctx);
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void si_gfx_resources_add_all_to_bo_list(struct si_context *sctx);
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void si_compute_resources_add_all_to_bo_list(struct si_context *sctx);
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bool si_gfx_resources_check_encrypted(struct si_context *sctx);
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bool si_compute_resources_check_encrypted(struct si_context *sctx);
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void si_all_descriptors_begin_new_cs(struct si_context *sctx);
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void si_upload_const_buffer(struct si_context *sctx, struct si_resource **buf, const uint8_t *ptr,
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unsigned size, uint32_t *const_offset);
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@ -1919,6 +1919,15 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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si_need_gfx_cs_space(sctx);
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/* If we're using a secure context, determine if cs must be secure or not */
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if (unlikely(sctx->ws->ws_is_secure(sctx->ws))) {
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bool secure = si_gfx_resources_check_encrypted(sctx);
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if (secure != sctx->ws->cs_is_secure(sctx->gfx_cs)) {
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si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
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sctx->ws->cs_set_secure(sctx->gfx_cs, secure);
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}
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}
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if (sctx->bo_list_add_all_gfx_resources)
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si_gfx_resources_add_all_to_bo_list(sctx);
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