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i965: Stop recomputing the miptree's size from the texture image.

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We've already computed what the dimensions of the miptree are, and stored
it in the miptree.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt 2013-06-19 14:08:29 -07:00
parent 820325b258
commit 88514d922e
2 changed files with 7 additions and 13 deletions
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9
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
View file

@ -961,7 +961,6 @@ brw_update_texture_surface(struct gl_context *ctx,
struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
uint32_t *surf;
int width, height, depth;
uint32_t tile_x, tile_y;
if (tObj->Target == GL_TEXTURE_BUFFER) {
@ -969,8 +968,6 @@ brw_update_texture_surface(struct gl_context *ctx,
return;
}
intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
6 * 4, 32, &binding_table[surf_index]);
@ -988,11 +985,11 @@ brw_update_texture_surface(struct gl_context *ctx,
&tile_x, &tile_y);
surf[2] = ((intelObj->_MaxLevel - tObj->BaseLevel) << BRW_SURFACE_LOD_SHIFT |
(width - 1) << BRW_SURFACE_WIDTH_SHIFT |
(height - 1) << BRW_SURFACE_HEIGHT_SHIFT);
(mt->logical_width0 - 1) << BRW_SURFACE_WIDTH_SHIFT |
(mt->logical_height0 - 1) << BRW_SURFACE_HEIGHT_SHIFT);
surf[3] = (brw_get_surface_tiling_bits(intelObj->mt->region->tiling) |
(depth - 1) << BRW_SURFACE_DEPTH_SHIFT |
(mt->logical_depth0 - 1) << BRW_SURFACE_DEPTH_SHIFT |
(intelObj->mt->region->pitch - 1) <<
BRW_SURFACE_PITCH_SHIFT);

11
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
View file

@ -295,7 +295,6 @@ gen7_update_texture_surface(struct gl_context *ctx,
struct intel_mipmap_tree *mt = intelObj->mt;
struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
int width, height, depth;
uint32_t tile_x, tile_y;
if (tObj->Target == GL_TEXTURE_BUFFER) {
@ -303,8 +302,6 @@ gen7_update_texture_surface(struct gl_context *ctx,
return;
}
intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
8 * 4, 32, &binding_table[surf_index]);
memset(surf, 0, 8 * 4);
@ -324,7 +321,7 @@ gen7_update_texture_surface(struct gl_context *ctx,
if (mt->align_w == 8)
surf[0] |= GEN7_SURFACE_HALIGN_8;
if (depth > 1 && tObj->Target != GL_TEXTURE_3D)
if (mt->logical_depth0 > 1 && tObj->Target != GL_TEXTURE_3D)
surf[0] |= GEN7_SURFACE_IS_ARRAY;
if (mt->array_spacing_lod0)
@ -334,9 +331,9 @@ gen7_update_texture_surface(struct gl_context *ctx,
surf[1] += intel_miptree_get_tile_offsets(intelObj->mt, firstImage->Level, 0,
&tile_x, &tile_y);
surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
surf[3] = SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) |
surf[2] = SET_FIELD(mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) |
SET_FIELD(mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT);
surf[3] = SET_FIELD(mt->logical_depth0 - 1, BRW_SURFACE_DEPTH) |
((intelObj->mt->region->pitch) - 1);
surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout);