diff --git a/src/intel/compiler/brw_analysis_performance.cpp b/src/intel/compiler/brw_analysis_performance.cpp index d5b73b73519..6c5583fe413 100644 --- a/src/intel/compiler/brw_analysis_performance.cpp +++ b/src/intel/compiler/brw_analysis_performance.cpp @@ -53,8 +53,6 @@ namespace { EU_UNIT_GATEWAY, /** Thread Spawner shared function. */ EU_UNIT_SPAWNER, - /* EU_UNIT_VME, */ - /* EU_UNIT_CRE, */ /** Number of asynchronous units currently tracked. */ EU_NUM_UNITS, /** Dummy unit for instructions that don't consume runtime from the above. */ @@ -584,11 +582,11 @@ namespace { case SHADER_OPCODE_SEND: case SHADER_OPCODE_SEND_GATHER: switch (info.sfid) { - case GFX6_SFID_DATAPORT_CONSTANT_CACHE: + case BRW_SFID_HDC_READ_ONLY: /* See FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD */ return calculate_desc(info, EU_UNIT_DP_CC, 2, 0, 0, 0, 16 /* XXX */, 10 /* XXX */, 100 /* XXX */, 0, 0, 0, 0); - case GFX6_SFID_DATAPORT_RENDER_CACHE: + case BRW_SFID_RENDER_CACHE: switch (brw_dp_desc_msg_type(devinfo, info.desc)) { case GFX7_DATAPORT_RC_TYPED_ATOMIC_OP: return calculate_desc(info, EU_UNIT_DP_RC, 2, 0, 0, @@ -609,7 +607,7 @@ namespace { return calculate_desc(info, EU_UNIT_SAMPLER, 2, 0, 0, 0, 16, 8, 750, 0, 0, 2, 0); } - case GFX7_SFID_DATAPORT_DATA_CACHE: + case BRW_SFID_HDC0: switch (brw_dp_desc_msg_type(devinfo, info.desc)) { case GFX7_DATAPORT_DC_MEMORY_FENCE: return calculate_desc(info, EU_UNIT_DP_DC, 2, 0, 0, @@ -622,7 +620,7 @@ namespace { 0, 0); } - case HSW_SFID_DATAPORT_DATA_CACHE_1: + case BRW_SFID_HDC1: switch (brw_dp_desc_msg_type(devinfo, info.desc)) { case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP: case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2: @@ -640,13 +638,13 @@ namespace { 0, 0); } - case GFX7_SFID_PIXEL_INTERPOLATOR: + case BRW_SFID_PIXEL_INTERPOLATOR: return calculate_desc(info, EU_UNIT_PI, 2, 0, 0, 14 /* XXX */, 0, 0, 90 /* XXX */, 0, 0, 0, 0); - case GFX12_SFID_UGM: - case GFX12_SFID_TGM: - case GFX12_SFID_SLM: + case BRW_SFID_UGM: + case BRW_SFID_TGM: + case BRW_SFID_SLM: switch (lsc_msg_desc_opcode(devinfo, info.desc)) { case LSC_OP_LOAD: case LSC_OP_STORE: @@ -690,8 +688,8 @@ namespace { } case BRW_SFID_MESSAGE_GATEWAY: - case GEN_RT_SFID_BINDLESS_THREAD_DISPATCH: /* or THREAD_SPAWNER */ - case GEN_RT_SFID_RAY_TRACE_ACCELERATOR: + case BRW_SFID_BINDLESS_THREAD_DISPATCH: /* or THREAD_SPAWNER */ + case BRW_SFID_RAY_TRACE_ACCELERATOR: return calculate_desc(info, EU_UNIT_SPAWNER, 2, 0, 0, 0 /* XXX */, 0, 10 /* XXX */, 0, 0, 0, 0, 0); diff --git a/src/intel/compiler/brw_compile_fs.cpp b/src/intel/compiler/brw_compile_fs.cpp index f02ad122eda..5265a2b5763 100644 --- a/src/intel/compiler/brw_compile_fs.cpp +++ b/src/intel/compiler/brw_compile_fs.cpp @@ -638,7 +638,7 @@ brw_emit_repclear_shader(brw_shader &s) write->header_size = i == 0 ? 0 : 2; write->mlen = 1 + write->header_size; - write->sfid = GFX6_SFID_DATAPORT_RENDER_CACHE; + write->sfid = BRW_SFID_RENDER_CACHE; write->src[0] = brw_imm_ud( brw_fb_write_desc( s.devinfo, i, diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 03b26c941c4..9d123d93c1c 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -293,23 +293,22 @@ static const char *const end_of_thread[2] = { [1] = "EOT" }; -static const char *const gfx6_sfid[16] = { - [BRW_SFID_NULL] = "null", - [BRW_SFID_SAMPLER] = "sampler", - [BRW_SFID_MESSAGE_GATEWAY] = "gateway", - [BRW_SFID_URB] = "urb", - [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", - [GFX6_SFID_DATAPORT_SAMPLER_CACHE] = "dp_sampler", - [GFX6_SFID_DATAPORT_RENDER_CACHE] = "render", - [GFX6_SFID_DATAPORT_CONSTANT_CACHE] = "const", - [GFX7_SFID_DATAPORT_DATA_CACHE] = "data", - [GFX7_SFID_PIXEL_INTERPOLATOR] = "pixel interp", - [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1", - [HSW_SFID_CRE] = "cre", - [GEN_RT_SFID_RAY_TRACE_ACCELERATOR] = "rt accel", - [GFX12_SFID_SLM] = "slm", - [GFX12_SFID_TGM] = "tgm", - [GFX12_SFID_UGM] = "ugm", +static const char *const brw_sfid[16] = { + [BRW_SFID_NULL] = "null", + [BRW_SFID_SAMPLER] = "sampler", + [BRW_SFID_MESSAGE_GATEWAY] = "gateway", + [BRW_SFID_HDC2] = "hdc2", + [BRW_SFID_RENDER_CACHE] = "render", + [BRW_SFID_URB] = "urb", + [BRW_SFID_THREAD_SPAWNER] = "ts/btd", + [BRW_SFID_RAY_TRACE_ACCELERATOR] = "rt accel", + [BRW_SFID_HDC_READ_ONLY] = "hdc:ro", + [BRW_SFID_HDC0] = "hdc0", + [BRW_SFID_PIXEL_INTERPOLATOR] = "pi", + [BRW_SFID_HDC1] = "hdc1", + [BRW_SFID_SLM] = "slm", + [BRW_SFID_TGM] = "tgm", + [BRW_SFID_UGM] = "ugm", }; static const char *const gfx7_gateway_subfuncid[8] = { @@ -1958,9 +1957,9 @@ static inline bool brw_sfid_is_lsc(unsigned sfid) { switch (sfid) { - case GFX12_SFID_UGM: - case GFX12_SFID_SLM: - case GFX12_SFID_TGM: + case BRW_SFID_UGM: + case BRW_SFID_SLM: + case BRW_SFID_TGM: return true; default: break; @@ -2120,7 +2119,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, } if (is_send(opcode)) { - enum brw_message_target sfid = brw_eu_inst_sfid(devinfo, inst); + enum brw_sfid sfid = brw_eu_inst_sfid(devinfo, inst); bool has_imm_desc = false, has_imm_ex_desc = false; uint32_t imm_desc = 0, imm_ex_desc = 0; @@ -2168,7 +2167,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, space = 0; fprintf(file, " "); - err |= control(file, "SFID", gfx6_sfid, sfid, &space); + err |= control(file, "SFID", brw_sfid, sfid, &space); string(file, " MsgDesc:"); if (!has_imm_desc) { @@ -2207,16 +2206,15 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, brw_sampler_desc_sampler(devinfo, imm_desc)); } break; - case GFX6_SFID_DATAPORT_SAMPLER_CACHE: - case GFX6_SFID_DATAPORT_CONSTANT_CACHE: + case BRW_SFID_HDC2: + case BRW_SFID_HDC_READ_ONLY: format(file, " (bti %u, msg_ctrl %u, msg_type %u)", brw_dp_desc_binding_table_index(devinfo, imm_desc), brw_dp_desc_msg_control(devinfo, imm_desc), brw_dp_desc_msg_type(devinfo, imm_desc)); break; - case GFX6_SFID_DATAPORT_RENDER_CACHE: { - /* aka BRW_SFID_DATAPORT_WRITE on Gfx4-5 */ + case BRW_SFID_RENDER_CACHE: { unsigned msg_type = brw_fb_desc_msg_type(devinfo, imm_desc); err |= control(file, "DP rc message type", @@ -2340,9 +2338,9 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, gfx7_gateway_subfuncid[brw_eu_inst_gateway_subfuncid(devinfo, inst)]); break; - case GFX12_SFID_SLM: - case GFX12_SFID_TGM: - case GFX12_SFID_UGM: { + case BRW_SFID_SLM: + case BRW_SFID_TGM: + case BRW_SFID_UGM: { assert(devinfo->has_lsc); format(file, " ("); const enum lsc_opcode op = lsc_msg_desc_opcode(devinfo, imm_desc); @@ -2423,7 +2421,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, break; } - case GFX7_SFID_DATAPORT_DATA_CACHE: + case BRW_SFID_HDC0: format(file, " ("); space = 0; @@ -2455,7 +2453,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, format(file, ")"); break; - case HSW_SFID_DATAPORT_DATA_CACHE_1: { + case BRW_SFID_HDC1: { format(file, " ("); space = 0; @@ -2512,14 +2510,14 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, break; } - case GFX7_SFID_PIXEL_INTERPOLATOR: + case BRW_SFID_PIXEL_INTERPOLATOR: format(file, " (%s, %s, 0x%02"PRIx64")", brw_eu_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp", pixel_interpolator_msg_types[brw_eu_inst_pi_message_type(devinfo, inst)], brw_eu_inst_pi_message_data(devinfo, inst)); break; - case GEN_RT_SFID_RAY_TRACE_ACCELERATOR: + case BRW_SFID_RAY_TRACE_ACCELERATOR: if (devinfo->has_ray_tracing) { format(file, " SIMD%d,", brw_rt_trace_ray_desc_exec_size(devinfo, imm_desc)); diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 66b8ca9f56b..7149f75497d 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -1164,37 +1164,29 @@ enum tgl_sync_function { }; /** - * Message target: Shared Function ID for where to SEND a message. + * Shared Function ID - which unit a SEND message targets. * - * These are enumerated in the ISA reference under "send - Send Message". - * In particular, see the following tables: - * - G45 PRM, Volume 4, Table 14-15 "Message Descriptor Definition" - * - Sandybridge PRM, Volume 4 Part 2, Table 8-16 "Extended Message Descriptor" - * - Ivybridge PRM, Volume 1 Part 1, section 3.2.7 "GPE Function IDs" + * See the Tigerlake and Alchemist PRMs, Volume 2b: Command Reference: + * Enumerations, in the table under "SFID": */ -enum brw_message_target { +enum brw_sfid { BRW_SFID_NULL = 0, BRW_SFID_SAMPLER = 2, BRW_SFID_MESSAGE_GATEWAY = 3, + BRW_SFID_HDC2 = 4, /* Legacy Data Port 2 */ + BRW_SFID_RENDER_CACHE = 5, BRW_SFID_URB = 6, - BRW_SFID_THREAD_SPAWNER = 7, - BRW_SFID_VME = 8, + BRW_SFID_THREAD_SPAWNER = 7, /* Gfx12.0 and earlier only */ + BRW_SFID_BINDLESS_THREAD_DISPATCH = 7, + BRW_SFID_RAY_TRACE_ACCELERATOR = 8, + BRW_SFID_HDC_READ_ONLY = 9, /* Read Only/Constant Data Cache */ + BRW_SFID_HDC0 = 10, /* Legacy Data Port 0 */ + BRW_SFID_PIXEL_INTERPOLATOR = 11, + BRW_SFID_HDC1 = 12, /* Legacy Data Port 1 */ - GFX6_SFID_DATAPORT_SAMPLER_CACHE = 4, - GFX6_SFID_DATAPORT_RENDER_CACHE = 5, - GFX6_SFID_DATAPORT_CONSTANT_CACHE = 9, - - GFX7_SFID_DATAPORT_DATA_CACHE = 10, - GFX7_SFID_PIXEL_INTERPOLATOR = 11, - HSW_SFID_DATAPORT_DATA_CACHE_1 = 12, - HSW_SFID_CRE = 13, - - GFX12_SFID_TGM = 13, /* Typed Global Memory */ - GFX12_SFID_SLM = 14, /* Shared Local Memory */ - GFX12_SFID_UGM = 15, /* Untyped Global Memory */ - - GEN_RT_SFID_BINDLESS_THREAD_DISPATCH = 7, - GEN_RT_SFID_RAY_TRACE_ACCELERATOR = 8, + BRW_SFID_TGM = 13, /* LSC: Typed Global Memory */ + BRW_SFID_SLM = 14, /* LSC: Shared Local Memory */ + BRW_SFID_UGM = 15, /* LSC: Untyped Global Memory */ }; #define GFX7_MESSAGE_TARGET_DP_DATA_CACHE 10 diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index eada80c26bc..425ea3c1a21 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -1512,7 +1512,7 @@ brw_send_indirect_split_message(struct brw_codegen *p, brw_eu_inst_set_send_sel_reg32_ex_desc(devinfo, send, 1); brw_eu_inst_set_send_ex_desc_ia_subreg_nr(devinfo, send, phys_subnr(devinfo, ex_desc) >> 2); - if (devinfo->ver >= 20 && sfid == GFX12_SFID_UGM) + if (devinfo->ver >= 20 && sfid == BRW_SFID_UGM) brw_eu_inst_set_bits(send, 103, 99, ex_mlen / reg_unit(devinfo)); } @@ -1522,7 +1522,7 @@ brw_send_indirect_split_message(struct brw_codegen *p, * * BSpec 56890 */ - if (devinfo->ver < 20 || sfid != GFX12_SFID_UGM) + if (devinfo->ver < 20 || sfid != BRW_SFID_UGM) brw_eu_inst_set_send_ex_bso(devinfo, send, true); brw_eu_inst_set_send_src1_len(devinfo, send, ex_mlen / reg_unit(devinfo)); } diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c index 6fd3933c13a..2f4385d7468 100644 --- a/src/intel/compiler/brw_eu_validate.c +++ b/src/intel/compiler/brw_eu_validate.c @@ -2141,9 +2141,9 @@ send_descriptor_restrictions(const struct brw_isa_info *isa, if (devinfo->ver < 20) break; FALLTHROUGH; - case GFX12_SFID_TGM: - case GFX12_SFID_SLM: - case GFX12_SFID_UGM: + case BRW_SFID_TGM: + case BRW_SFID_SLM: + case BRW_SFID_UGM: ERROR_IF(!devinfo->has_lsc, "Platform does not support LSC"); ERROR_IF(lsc_opcode_has_transpose(lsc_msg_desc_opcode(devinfo, desc)) && diff --git a/src/intel/compiler/brw_from_nir.cpp b/src/intel/compiler/brw_from_nir.cpp index 5fbd0b49106..234fc0e6e74 100644 --- a/src/intel/compiler/brw_from_nir.cpp +++ b/src/intel/compiler/brw_from_nir.cpp @@ -4755,7 +4755,7 @@ emit_rt_lsc_fence(const brw_builder &bld, brw_imm_ud(0) /* desc */, brw_imm_ud(0) /* ex_desc */, brw_vec8_grf(0, 0) /* payload */); - send->sfid = GFX12_SFID_UGM; + send->sfid = BRW_SFID_UGM; send->desc = lsc_fence_msg_desc(devinfo, scope, flush_type, true); send->mlen = reg_unit(devinfo); /* g0 header */ send->ex_mlen = 0; @@ -6001,13 +6001,13 @@ brw_from_nir_emit_intrinsic(nir_to_brw_state &ntb, lsc_fence_descriptor_for_intrinsic(devinfo, instr); if (ugm_fence) { fence_regs[fence_regs_count++] = - emit_fence(ubld1, opcode, GFX12_SFID_UGM, desc, + emit_fence(ubld1, opcode, BRW_SFID_UGM, desc, true /* commit_enable */); } if (tgm_fence) { fence_regs[fence_regs_count++] = - emit_fence(ubld1, opcode, GFX12_SFID_TGM, desc, + emit_fence(ubld1, opcode, BRW_SFID_TGM, desc, true /* commit_enable */); } @@ -6022,7 +6022,7 @@ brw_from_nir_emit_intrinsic(nir_to_brw_state &ntb, ubld1.SYNC(TGL_SYNC_ALLWR); } fence_regs[fence_regs_count++] = - emit_fence(ubld1, opcode, GFX12_SFID_SLM, desc, + emit_fence(ubld1, opcode, BRW_SFID_SLM, desc, true /* commit_enable */); } @@ -6035,7 +6035,7 @@ brw_from_nir_emit_intrinsic(nir_to_brw_state &ntb, } else if (devinfo->ver >= 11) { if (tgm_fence || ugm_fence || urb_fence) { fence_regs[fence_regs_count++] = - emit_fence(ubld1, opcode, GFX7_SFID_DATAPORT_DATA_CACHE, 0, + emit_fence(ubld1, opcode, BRW_SFID_HDC0, 0, true /* commit_enable HSD ES # 1404612949 */); } @@ -6046,7 +6046,7 @@ brw_from_nir_emit_intrinsic(nir_to_brw_state &ntb, * special binding table index and the normal DATA_CACHE SFID. */ fence_regs[fence_regs_count++] = - emit_fence(ubld1, opcode, GFX12_SFID_SLM, 0, + emit_fence(ubld1, opcode, BRW_SFID_SLM, 0, true /* commit_enable HSD ES # 1404612949 */); } } else { @@ -6058,8 +6058,7 @@ brw_from_nir_emit_intrinsic(nir_to_brw_state &ntb, if (tgm_fence || ugm_fence || slm_fence || urb_fence) { fence_regs[fence_regs_count++] = - emit_fence(ubld1, opcode, GFX7_SFID_DATAPORT_DATA_CACHE, 0, - commit_enable); + emit_fence(ubld1, opcode, BRW_SFID_HDC0, 0, commit_enable); } } diff --git a/src/intel/compiler/brw_gram.y b/src/intel/compiler/brw_gram.y index ba889126766..2955bb9bf98 100644 --- a/src/intel/compiler/brw_gram.y +++ b/src/intel/compiler/brw_gram.y @@ -409,8 +409,8 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t %type sync_arg /* shared functions for send */ -%token CONST CRE DATA DP_DATA_1 GATEWAY PIXEL_INTERP RENDER SAMPLER -%token THREAD_SPAWNER URB VME DP_SAMPLER RT_ACCEL SLM TGM UGM +%token HDC0 HDC1 HDC2 HDC_RO GATEWAY PIXEL_INTERP RENDER SAMPLER +%token TS_BTD URB RT_ACCEL SLM TGM UGM /* message details for send */ %token MSGDESC_BEGIN SRC1_LEN EX_BSO MSGDESC_END @@ -1036,20 +1036,18 @@ sharedfunction: NULL_TOKEN { $$ = BRW_SFID_NULL; } | GATEWAY { $$ = BRW_SFID_MESSAGE_GATEWAY; } | URB { $$ = BRW_SFID_URB; } - | THREAD_SPAWNER { $$ = BRW_SFID_THREAD_SPAWNER; } - | VME { $$ = BRW_SFID_VME; } - | RENDER { $$ = GFX6_SFID_DATAPORT_RENDER_CACHE; } - | CONST { $$ = GFX6_SFID_DATAPORT_CONSTANT_CACHE; } - | DATA { $$ = GFX7_SFID_DATAPORT_DATA_CACHE; } - | PIXEL_INTERP { $$ = GFX7_SFID_PIXEL_INTERPOLATOR; } - | DP_DATA_1 { $$ = HSW_SFID_DATAPORT_DATA_CACHE_1; } - | CRE { $$ = HSW_SFID_CRE; } + | TS_BTD { $$ = BRW_SFID_BINDLESS_THREAD_DISPATCH; } + | RENDER { $$ = BRW_SFID_RENDER_CACHE; } + | HDC_RO { $$ = BRW_SFID_HDC_READ_ONLY; } + | HDC0 { $$ = BRW_SFID_HDC0; } + | PIXEL_INTERP { $$ = BRW_SFID_PIXEL_INTERPOLATOR; } + | HDC1 { $$ = BRW_SFID_HDC1; } | SAMPLER { $$ = BRW_SFID_SAMPLER; } - | DP_SAMPLER { $$ = GFX6_SFID_DATAPORT_SAMPLER_CACHE; } - | RT_ACCEL { $$ = GEN_RT_SFID_RAY_TRACE_ACCELERATOR; } - | SLM { $$ = GFX12_SFID_SLM; } - | TGM { $$ = GFX12_SFID_TGM; } - | UGM { $$ = GFX12_SFID_UGM; } + | HDC2 { $$ = BRW_SFID_HDC2; } + | RT_ACCEL { $$ = BRW_SFID_RAY_TRACE_ACCELERATOR; } + | SLM { $$ = BRW_SFID_SLM; } + | TGM { $$ = BRW_SFID_TGM; } + | UGM { $$ = BRW_SFID_UGM; } ; exp2: diff --git a/src/intel/compiler/brw_lex.l b/src/intel/compiler/brw_lex.l index 2a6b37488ff..f859d499919 100644 --- a/src/intel/compiler/brw_lex.l +++ b/src/intel/compiler/brw_lex.l @@ -163,19 +163,17 @@ bar { yylval.integer = TGL_SYNC_BAR; return BAR; } host { yylval.integer = TGL_SYNC_HOST; return HOST; } /* shared functions for send instruction */ -sampler { return SAMPLER; } -dp_sampler { return DP_SAMPLER; } gateway { return GATEWAY; } -urb { return URB; } -thread_spawner { return THREAD_SPAWNER; } +hdc0 { return HDC0; } +hdc1 { return HDC1; } +hdc2 { return HDC2; } +"hdc:ro" { return HDC_RO; } +pi { return PIXEL_INTERP; } render { return RENDER; } -const { return CONST; } -data { return DATA; } -cre { return CRE; } -vme { return VME; } -"pixel interp" { return PIXEL_INTERP; } -"dp data 1" { return DP_DATA_1; } "rt accel" { return RT_ACCEL; } +sampler { return SAMPLER; } +"ts/btd" { return TS_BTD; } +urb { return URB; } slm { return SLM; } tgm { return TGM; } ugm { return UGM; } diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index 439881df41e..6c43b91d075 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -491,7 +491,7 @@ lower_fb_write_logical_send(const brw_builder &bld, brw_inst *inst, inst->opcode = SHADER_OPCODE_SEND; inst->resize_sources(3); - inst->sfid = GFX6_SFID_DATAPORT_RENDER_CACHE; + inst->sfid = BRW_SFID_RENDER_CACHE; inst->src[0] = desc; inst->src[1] = brw_imm_ud(0); inst->src[2] = payload; @@ -562,7 +562,7 @@ lower_fb_read_logical_send(const brw_builder &bld, brw_inst *inst, inst->src[3] = brw_reg(); inst->mlen = length; inst->header_size = length; - inst->sfid = GFX6_SFID_DATAPORT_RENDER_CACHE; + inst->sfid = BRW_SFID_RENDER_CACHE; inst->check_tdr = true; inst->desc = (inst->group / 16) << 11 | /* rt slot group */ @@ -1401,7 +1401,7 @@ setup_lsc_surface_descriptors(const brw_builder &bld, brw_inst *inst, */ inst->src[1] = retype(surface, BRW_TYPE_UD); /* Gfx20+ assumes ExBSO with UGM */ - if (devinfo->ver >= 20 && inst->sfid == GFX12_SFID_UGM) + if (devinfo->ver >= 20 && inst->sfid == BRW_SFID_UGM) inst->send_ex_bso = true; break; @@ -1547,13 +1547,13 @@ lower_lsc_memory_logical_send(const brw_builder &bld, brw_inst *inst) case MEMORY_MODE_UNTYPED: case MEMORY_MODE_CONSTANT: case MEMORY_MODE_SCRATCH: - inst->sfid = GFX12_SFID_UGM; + inst->sfid = BRW_SFID_UGM; break; case MEMORY_MODE_TYPED: - inst->sfid = GFX12_SFID_TGM; + inst->sfid = BRW_SFID_TGM; break; case MEMORY_MODE_SHARED_LOCAL: - inst->sfid = GFX12_SFID_SLM; + inst->sfid = BRW_SFID_SLM; break; } assert(inst->sfid); @@ -1562,7 +1562,7 @@ lower_lsc_memory_logical_send(const brw_builder &bld, brw_inst *inst) * shaders. (see HSD 18038444588) */ if (devinfo->ver >= 20 && gl_shader_stage_is_rt(bld.shader->stage) && - inst->sfid == GFX12_SFID_TGM && + inst->sfid == BRW_SFID_TGM && !lsc_opcode_is_atomic(op)) { if (lsc_opcode_is_store(op)) { cache_mode = (unsigned) LSC_CACHE(devinfo, STORE, L1UC_L3WB); @@ -1785,7 +1785,7 @@ lower_hdc_memory_logical_send(const brw_builder &bld, brw_inst *inst) assert(addr_size == LSC_ADDR_SIZE_A32); assert(!block); - sfid = HSW_SFID_DATAPORT_DATA_CACHE_1; + sfid = BRW_SFID_HDC1; if (lsc_opcode_is_atomic(op)) { desc = brw_dp_typed_atomic_desc(devinfo, inst->exec_size, inst->group, @@ -1798,13 +1798,13 @@ lower_hdc_memory_logical_send(const brw_builder &bld, brw_inst *inst) } else if (mode == MEMORY_MODE_CONSTANT) { assert(block); /* non-block loads not yet handled */ - sfid = GFX6_SFID_DATAPORT_CONSTANT_CACHE; + sfid = BRW_SFID_HDC_READ_ONLY; desc = brw_dp_oword_block_rw_desc(devinfo, false, components, !has_dest); } else if (addr_size == LSC_ADDR_SIZE_A64) { assert(binding_type == LSC_ADDR_SURFTYPE_FLAT); assert(!dword_scattered); - sfid = HSW_SFID_DATAPORT_DATA_CACHE_1; + sfid = BRW_SFID_HDC1; if (lsc_opcode_is_atomic(op)) { unsigned aop = lsc_op_to_legacy_atomic(op); @@ -1830,8 +1830,7 @@ lower_hdc_memory_logical_send(const brw_builder &bld, brw_inst *inst) } else { assert(binding_type != LSC_ADDR_SURFTYPE_FLAT); - sfid = surface_access ? HSW_SFID_DATAPORT_DATA_CACHE_1 - : GFX7_SFID_DATAPORT_DATA_CACHE; + sfid = surface_access ? BRW_SFID_HDC1 : BRW_SFID_HDC0; if (lsc_opcode_is_atomic(op)) { unsigned aop = lsc_op_to_legacy_atomic(op); @@ -1942,7 +1941,7 @@ lower_lsc_varying_pull_constant_logical_send(const brw_builder &bld, unsigned alignment = alignment_B.ud; inst->opcode = SHADER_OPCODE_SEND; - inst->sfid = GFX12_SFID_UGM; + inst->sfid = BRW_SFID_UGM; inst->resize_sources(3); inst->send_ex_bso = surf_type == LSC_ADDR_SURFTYPE_BSS && compiler->extended_bindless_surface_offset; @@ -2046,7 +2045,7 @@ lower_varying_pull_constant_logical_send(const brw_builder &bld, brw_inst *inst) 4, /* num_channels */ false /* write */); - inst->sfid = HSW_SFID_DATAPORT_DATA_CACHE_1; + inst->sfid = BRW_SFID_HDC1; setup_surface_descriptors(bld, inst, desc, surface, surface_handle); } else { const uint32_t desc = @@ -2054,7 +2053,7 @@ lower_varying_pull_constant_logical_send(const brw_builder &bld, brw_inst *inst) 32, /* bit_size */ false /* write */); - inst->sfid = GFX7_SFID_DATAPORT_DATA_CACHE; + inst->sfid = BRW_SFID_HDC0; setup_surface_descriptors(bld, inst, desc, surface, surface_handle); /* The byte scattered messages can only read one dword at a time so @@ -2193,7 +2192,7 @@ lower_interpolator_logical_send(const brw_builder &bld, brw_inst *inst, } inst->opcode = SHADER_OPCODE_SEND; - inst->sfid = GFX7_SFID_PIXEL_INTERPOLATOR; + inst->sfid = BRW_SFID_PIXEL_INTERPOLATOR; inst->desc = desc_imm; inst->ex_desc = 0; inst->mlen = mlen; @@ -2277,7 +2276,7 @@ lower_btd_logical_send(const brw_builder &bld, brw_inst *inst) inst->send_is_volatile = false; /* Set up SFID and descriptors */ - inst->sfid = GEN_RT_SFID_BINDLESS_THREAD_DISPATCH; + inst->sfid = BRW_SFID_BINDLESS_THREAD_DISPATCH; inst->desc = brw_btd_spawn_desc(devinfo, inst->exec_size, GEN_RT_BTD_MESSAGE_SPAWN); inst->resize_sources(4); @@ -2375,7 +2374,7 @@ lower_trace_ray_logical_send(const brw_builder &bld, brw_inst *inst) inst->send_is_volatile = false; /* Set up SFID and descriptors */ - inst->sfid = GEN_RT_SFID_RAY_TRACE_ACCELERATOR; + inst->sfid = BRW_SFID_RAY_TRACE_ACCELERATOR; inst->desc = brw_rt_trace_ray_desc(devinfo, inst->exec_size); inst->resize_sources(4); inst->src[0] = brw_imm_ud(0); /* desc */ @@ -2457,7 +2456,7 @@ lower_lsc_memory_fence_and_interlock(const brw_builder &bld, brw_inst *inst) enum lsc_flush_type flush_type = lsc_fence_msg_desc_flush_type(devinfo, inst->desc); - if (inst->sfid == GFX12_SFID_TGM) { + if (inst->sfid == BRW_SFID_TGM) { scope = LSC_FENCE_TILE; flush_type = LSC_FLUSH_TYPE_EVICT; } @@ -2495,14 +2494,14 @@ lower_hdc_memory_fence_and_interlock(const brw_builder &bld, brw_inst *inst) const bool commit_enable = inst->src[1].ud; bool slm = false; - if (inst->sfid == GFX12_SFID_SLM) { + if (inst->sfid == BRW_SFID_SLM) { assert(devinfo->ver >= 11); /* This SFID doesn't exist on Gfx11-12.0, but we use it to represent * SLM fences, and map back here to the way Gfx11 represented that: * a special "SLM" binding table index and the data cache SFID. */ - inst->sfid = GFX7_SFID_DATAPORT_DATA_CACHE; + inst->sfid = BRW_SFID_HDC0; slm = true; } @@ -2522,9 +2521,8 @@ lower_hdc_memory_fence_and_interlock(const brw_builder &bld, brw_inst *inst) inst->header_size = 1; const unsigned msg_type = - inst->sfid == GFX6_SFID_DATAPORT_RENDER_CACHE ? - GFX7_DATAPORT_RC_MEMORY_FENCE : - GFX7_DATAPORT_DC_MEMORY_FENCE; + inst->sfid == BRW_SFID_RENDER_CACHE ? GFX7_DATAPORT_RC_MEMORY_FENCE : + GFX7_DATAPORT_DC_MEMORY_FENCE; inst->desc = brw_dp_desc(devinfo, slm ? GFX7_BTI_SLM : 0, msg_type, commit_enable ? 1 << 5 : 0); @@ -2691,7 +2689,7 @@ brw_lower_uniform_pull_constant_loads(brw_shader &s) const brw_reg payload = ubld.vgrf(BRW_TYPE_UD); ubld.MOV(payload, offset_B); - inst->sfid = GFX12_SFID_UGM; + inst->sfid = BRW_SFID_UGM; inst->desc = lsc_msg_desc(devinfo, LSC_OP_LOAD, surface_handle.file == BAD_FILE ? LSC_ADDR_SURFTYPE_BTI : @@ -2732,7 +2730,7 @@ brw_lower_uniform_pull_constant_loads(brw_shader &s) ubld.group(1, 0).MOV(component(header, 2), brw_imm_ud(offset_B.ud / 16)); - inst->sfid = GFX6_SFID_DATAPORT_CONSTANT_CACHE; + inst->sfid = BRW_SFID_HDC_READ_ONLY; inst->opcode = SHADER_OPCODE_SEND; inst->header_size = 1; inst->mlen = 1; diff --git a/src/intel/compiler/brw_opt.cpp b/src/intel/compiler/brw_opt.cpp index afb4f52ab8c..3f203329f89 100644 --- a/src/intel/compiler/brw_opt.cpp +++ b/src/intel/compiler/brw_opt.cpp @@ -723,9 +723,9 @@ brw_opt_send_gather_to_send(brw_shader &s) * * TODO: Pass LSC address length or infer it so valid splits can work. */ - if (payload2_len && (inst->sfid == GFX12_SFID_UGM || - inst->sfid == GFX12_SFID_TGM || - inst->sfid == GFX12_SFID_SLM || + if (payload2_len && (inst->sfid == BRW_SFID_UGM || + inst->sfid == BRW_SFID_TGM || + inst->sfid == BRW_SFID_SLM || inst->sfid == BRW_SFID_URB)) { enum lsc_opcode lsc_op = lsc_msg_desc_opcode(devinfo, inst->desc); if (lsc_op_num_data_values(lsc_op) > 0) diff --git a/src/intel/compiler/brw_reg_allocate.cpp b/src/intel/compiler/brw_reg_allocate.cpp index 81c8dec7790..7fa00a068c2 100644 --- a/src/intel/compiler/brw_reg_allocate.cpp +++ b/src/intel/compiler/brw_reg_allocate.cpp @@ -705,13 +705,12 @@ brw_reg_alloc::build_ex_desc(const brw_builder &bld, unsigned reg_size, bool uns } else { if (unspill) { inst = bld.exec_all().group(1, 0).OR( - ex_desc, ex_desc, brw_imm_ud(GFX12_SFID_UGM)); + ex_desc, ex_desc, brw_imm_ud(BRW_SFID_UGM)); _mesa_set_add(spill_insts, inst); } else { inst = bld.exec_all().group(1, 0).OR( ex_desc, ex_desc, - brw_imm_ud(brw_message_ex_desc(devinfo, reg_size) | - GFX12_SFID_UGM)); + brw_imm_ud(brw_message_ex_desc(devinfo, reg_size) | BRW_SFID_UGM)); _mesa_set_add(spill_insts, inst); } } @@ -841,7 +840,7 @@ brw_reg_alloc::emit_unspill(const brw_builder &bld, unspill_inst = ubld.emit(SHADER_OPCODE_SEND, dst, srcs, ARRAY_SIZE(srcs)); - unspill_inst->sfid = GFX12_SFID_UGM; + unspill_inst->sfid = BRW_SFID_UGM; unspill_inst->header_size = 0; unspill_inst->mlen = lsc_msg_addr_len(devinfo, LSC_ADDR_SIZE_A32, unspill_inst->exec_size); @@ -874,7 +873,7 @@ brw_reg_alloc::emit_unspill(const brw_builder &bld, unspill_inst->size_written = reg_size * REG_SIZE; unspill_inst->send_has_side_effects = false; unspill_inst->send_is_volatile = true; - unspill_inst->sfid = GFX7_SFID_DATAPORT_DATA_CACHE; + unspill_inst->sfid = BRW_SFID_HDC0; unspill_inst->src[0] = brw_imm_ud( brw_dp_desc(devinfo, bti, @@ -918,7 +917,7 @@ brw_reg_alloc::emit_spill(const brw_builder &bld, }; spill_inst = bld.emit(SHADER_OPCODE_SEND, bld.null_reg_f(), srcs, ARRAY_SIZE(srcs)); - spill_inst->sfid = GFX12_SFID_UGM; + spill_inst->sfid = BRW_SFID_UGM; uint32_t desc = lsc_msg_desc(devinfo, LSC_OP_STORE, LSC_ADDR_SURFTYPE_SS, LSC_ADDR_SIZE_A32, @@ -958,7 +957,7 @@ brw_reg_alloc::emit_spill(const brw_builder &bld, spill_inst->header_size = 1; spill_inst->send_has_side_effects = true; spill_inst->send_is_volatile = false; - spill_inst->sfid = GFX7_SFID_DATAPORT_DATA_CACHE; + spill_inst->sfid = BRW_SFID_HDC0; spill_inst->src[0] = brw_imm_ud( brw_dp_desc(devinfo, bti, diff --git a/src/intel/compiler/brw_schedule_instructions.cpp b/src/intel/compiler/brw_schedule_instructions.cpp index f0a27fbfead..34362cb1612 100644 --- a/src/intel/compiler/brw_schedule_instructions.cpp +++ b/src/intel/compiler/brw_schedule_instructions.cpp @@ -357,12 +357,12 @@ schedule_node::set_latency(const struct brw_isa_info *isa) break; } - case GFX6_SFID_DATAPORT_CONSTANT_CACHE: + case BRW_SFID_HDC_READ_ONLY: /* See FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD */ latency = 200; break; - case GFX6_SFID_DATAPORT_RENDER_CACHE: + case BRW_SFID_RENDER_CACHE: switch (brw_fb_desc_msg_type(isa->devinfo, inst->desc)) { case GFX7_DATAPORT_RC_TYPED_SURFACE_WRITE: case GFX7_DATAPORT_RC_TYPED_SURFACE_READ: @@ -386,7 +386,7 @@ schedule_node::set_latency(const struct brw_isa_info *isa) } break; - case GFX7_SFID_DATAPORT_DATA_CACHE: + case BRW_SFID_HDC0: switch ((inst->desc >> 14) & 0x1f) { case BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ: case GFX7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ: @@ -458,7 +458,7 @@ schedule_node::set_latency(const struct brw_isa_info *isa) } break; - case HSW_SFID_DATAPORT_DATA_CACHE_1: + case BRW_SFID_HDC1: switch (brw_dp_desc_msg_type(isa->devinfo, inst->desc)) { case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ: case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE: @@ -492,13 +492,13 @@ schedule_node::set_latency(const struct brw_isa_info *isa) } break; - case GFX7_SFID_PIXEL_INTERPOLATOR: + case BRW_SFID_PIXEL_INTERPOLATOR: latency = 50; /* TODO */ break; - case GFX12_SFID_UGM: - case GFX12_SFID_TGM: - case GFX12_SFID_SLM: + case BRW_SFID_UGM: + case BRW_SFID_TGM: + case BRW_SFID_SLM: switch (lsc_msg_desc_opcode(isa->devinfo, inst->desc)) { case LSC_OP_LOAD: case LSC_OP_STORE: @@ -534,8 +534,8 @@ schedule_node::set_latency(const struct brw_isa_info *isa) break; case BRW_SFID_MESSAGE_GATEWAY: - case GEN_RT_SFID_BINDLESS_THREAD_DISPATCH: /* or THREAD_SPAWNER */ - case GEN_RT_SFID_RAY_TRACE_ACCELERATOR: + case BRW_SFID_BINDLESS_THREAD_DISPATCH: /* or THREAD_SPAWNER */ + case BRW_SFID_RAY_TRACE_ACCELERATOR: /* TODO. * * We'll assume for the moment that this is pretty quick as it diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 86d4a45956c..07347fbe16e 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -700,7 +700,7 @@ brw_shader::assign_curb_setup() BRW_TYPE_UD); brw_inst *send = ubld.emit(SHADER_OPCODE_SEND, dest, srcs, 4); - send->sfid = GFX12_SFID_UGM; + send->sfid = BRW_SFID_UGM; uint32_t desc = lsc_msg_desc(devinfo, LSC_OP_LOAD, LSC_ADDR_SURFTYPE_FLAT, pull_constants_a64 ? diff --git a/src/intel/compiler/brw_workaround.cpp b/src/intel/compiler/brw_workaround.cpp index f55b30be8dc..98c98ed02ce 100644 --- a/src/intel/compiler/brw_workaround.cpp +++ b/src/intel/compiler/brw_workaround.cpp @@ -43,7 +43,7 @@ needs_dummy_fence(const intel_device_info *devinfo, brw_inst *inst) /* This workaround is about making sure that any instruction writing * through UGM has completed before we hit EOT. */ - if (inst->sfid != GFX12_SFID_UGM) + if (inst->sfid != BRW_SFID_UGM) return false; /* Any UGM, non-Scratch-surface Stores (not including Atomic) messages, @@ -106,7 +106,7 @@ brw_workaround_memory_fence_before_eot(brw_shader &s) brw_inst *dummy_fence = ubld.emit(SHADER_OPCODE_MEMORY_FENCE, dst, brw_vec8_grf(0, 0), /* commit enable */ brw_imm_ud(1)); - dummy_fence->sfid = GFX12_SFID_UGM; + dummy_fence->sfid = BRW_SFID_UGM; dummy_fence->desc = lsc_fence_msg_desc(s.devinfo, LSC_FENCE_TILE, LSC_FLUSH_TYPE_NONE_6, false); dummy_fence->size_written = REG_SIZE * reg_unit(s.devinfo); diff --git a/src/intel/compiler/tests/gen12.5/send.asm b/src/intel/compiler/tests/gen12.5/send.asm index 6321737809f..5f94c9e5866 100644 --- a/src/intel/compiler/tests/gen12.5/send.asm +++ b/src/intel/compiler/tests/gen12.5/send.asm @@ -23,7 +23,7 @@ send(1) g10UD g0UD nullUD 0x0210011f send(1) g23UD g117UD nullUD 0x2210c500 a0.1<0>UD ugm MsgDesc: ( load, a32, d32, V8, transpose, L1STATE_L3MOCS dst_len = 1, src0_len = 1, bss ) src1_len = 0 ex_bso surface_state_index 0 { align1 WE_all 1N @1 $10 }; send(8) nullUD g14UD g24UD 0x040350fc a0.1<0>UD - dp data 1 MsgDesc: (DC typed surface write, Surface = 252, SIMD16, Mask = 0x0) src1_len = 4 ex_bso mlen 2 rlen 0 { align1 1Q @1 $5 }; + hdc1 MsgDesc: (DC typed surface write, Surface = 252, SIMD16, Mask = 0x0) src1_len = 4 ex_bso mlen 2 rlen 0 { align1 1Q @1 $5 }; send(8) nullUD g51UD g52UD 0x02000000 0x00000040 rt accel MsgDesc: SIMD8, mlen 1 ex_mlen 1 rlen 0 { align1 1Q $2 }; send(16) nullUD g88UD g98UD 0x02000100 0x00000080 diff --git a/src/intel/compiler/tests/gen12/send.asm b/src/intel/compiler/tests/gen12/send.asm index 81119aa8ccf..d7c58c59109 100644 --- a/src/intel/compiler/tests/gen12/send.asm +++ b/src/intel/compiler/tests/gen12/send.asm @@ -1,37 +1,37 @@ send(16) g113UD g12UD nullUD a0<0>UD 0x00000000 - dp data 1 MsgDesc: indirect ex_mlen 0 { align1 1H @1 $6 }; + hdc1 MsgDesc: indirect ex_mlen 0 { align1 1H @1 $6 }; (+f1.0) send(16) nullUD g15UD g17UD a0<0>UD 0x00000080 - dp data 1 MsgDesc: indirect ex_mlen 2 { align1 1H @1 $4 }; + hdc1 MsgDesc: indirect ex_mlen 2 { align1 1H @1 $4 }; send(8) g104UD g119UD nullUD 0x04116e13 0x00000000 - dp data 1 MsgDesc: (DC typed surface read, Surface = 19, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 2Q $8 }; + hdc1 MsgDesc: (DC typed surface read, Surface = 19, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 2Q $8 }; send(8) nullUD g92UD g117UD 0x020350fc a0.1<0>UD - dp data 1 MsgDesc: (DC typed surface write, Surface = 252, SIMD16, Mask = 0x0) mlen 1 rlen 0 { align1 1Q @1 $8 }; + hdc1 MsgDesc: (DC typed surface write, Surface = 252, SIMD16, Mask = 0x0) mlen 1 rlen 0 { align1 1Q @1 $8 }; (+f0.0.any8h) send(8) g55UD g118UD nullUD 0x02184201 0x00000000 - data MsgDesc: (DC unaligned OWORD block read, bti 1, 2) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1Q @3 $9 }; + hdc0 MsgDesc: (DC unaligned OWORD block read, bti 1, 2) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1Q @3 $9 }; send(8) nullUD g126UD nullUD 0x02000000 0x00000000 - thread_spawner MsgDesc: mlen 1 ex_mlen 0 rlen 0 { align1 WE_all 1Q @1 EOT }; + ts/btd MsgDesc: mlen 1 ex_mlen 0 rlen 0 { align1 WE_all 1Q @1 EOT }; send(8) g18UD g24UD nullUD 0x04115e10 0x00000000 - dp data 1 MsgDesc: (DC typed surface read, Surface = 16, SIMD16, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 1Q $1 }; + hdc1 MsgDesc: (DC typed surface read, Surface = 16, SIMD16, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 1Q $1 }; send(8) g19UD g28UD nullUD 0x04116e10 0x00000000 - dp data 1 MsgDesc: (DC typed surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 2Q @7 $2 }; + hdc1 MsgDesc: (DC typed surface read, Surface = 16, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 2Q @7 $2 }; send(16) g50UD g36UD nullUD a0<0>UD 0x00000000 sampler MsgDesc: indirect ex_mlen 0 { align1 1H @1 $3 }; send(8) nullUD g25UD g21UD 0x02035001 0x00000100 - dp data 1 MsgDesc: (DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q $9 }; + hdc1 MsgDesc: (DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q $9 }; send(8) g5UD g25UD nullUD 0x02415001 0x00000000 - dp data 1 MsgDesc: (DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 0 rlen 4 { align1 1Q $10 }; + hdc1 MsgDesc: (DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 0 rlen 4 { align1 1Q $10 }; send(8) g27UD g35UD nullUD 0x04146efd 0x00000000 - dp data 1 MsgDesc: (DC A64 untyped surface read, Surface = 253, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 1Q @1 $0 }; + hdc1 MsgDesc: (DC A64 untyped surface read, Surface = 253, SIMD8, Mask = 0xe) mlen 2 ex_mlen 0 rlen 1 { align1 1Q @1 $0 }; send(8) nullUD g36UD g38UD 0x04035001 0x00000100 - dp data 1 MsgDesc: (DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q @1 $1 }; + hdc1 MsgDesc: (DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q @1 $1 }; send(8) nullUD g126UD g118UD 0x02080007 0x00000200 urb MsgDesc: offset 0 SIMD8 write mlen 1 ex_mlen 8 rlen 0 { align1 1Q @1 EOT }; send(8) g14UD g37UD nullUD 0x02110401 0x00000000 - data MsgDesc: (DC byte scattered read, bti 1, 4) mlen 1 ex_mlen 0 rlen 1 { align1 1Q @1 $0 }; + hdc0 MsgDesc: (DC byte scattered read, bti 1, 4) mlen 1 ex_mlen 0 rlen 1 { align1 1Q @1 $0 }; send(1) g100UD g0UD nullUD 0x0219e000 0x00000000 - data MsgDesc: (DC mfence, bti 0, 32) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1N $1 }; + hdc0 MsgDesc: (DC mfence, bti 0, 32) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1N $1 }; send(1) g15UD g0UD nullUD 0x0219e000 0x00000000 - data MsgDesc: (DC mfence, bti 0, 32) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1N $5 }; + hdc0 MsgDesc: (DC mfence, bti 0, 32) mlen 1 ex_mlen 0 rlen 1 { align1 WE_all 1N $5 }; sendc(16) nullUD g119UD nullUD 0x10031000 0x00000000 render MsgDesc: RT write SIMD16 LastRT Surface = 0 mlen 8 ex_mlen 0 rlen 0 { align1 1H @1 EOT }; diff --git a/src/intel/compiler/tests/gen9/send.asm b/src/intel/compiler/tests/gen9/send.asm index 918859e7d52..99d55feb5d1 100644 --- a/src/intel/compiler/tests/gen9/send.asm +++ b/src/intel/compiler/tests/gen9/send.asm @@ -5,11 +5,11 @@ send(8) null<1>F g13<8,8,1>F 0x12080007 send(8) null<1>F g123<8,8,1>F 0x8a080027 urb MsgDesc: 2 SIMD8 write mlen 5 rlen 0 { align1 1Q EOT }; send(16) g9<1>UD g2<0,1,0>UD 0x02280300 - const MsgDesc: (0, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; + hdc:ro MsgDesc: (0, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; send(8) null<1>F g119<8,8,1>F 0x92080017 urb MsgDesc: 1 SIMD8 write mlen 9 rlen 0 { align1 1Q EOT }; send(16) null<1>UW g127<8,8,1>UW 0x82000010 - thread_spawner MsgDesc: mlen 1 rlen 0 { align1 WE_all 1H EOT }; + ts/btd MsgDesc: mlen 1 rlen 0 { align1 WE_all 1H EOT }; send(8) g124<1>UW g13<8,8,1>UD 0x0643a001 sampler MsgDesc: ld_lz SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 4 { align1 1Q }; send(16) g120<1>UW g23<8,8,1>UD 0x0c85a001 @@ -93,9 +93,9 @@ send(8) null<1>F g123<8,8,1>F 0x8a080037 send(8) g6<1>UW g11<8,8,1>UD 0x144a4001 sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 10 rlen 4 { align1 1Q }; (+f1.0) send(8) g125<1>UW g3<8,8,1>UD 0x0210b501 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, inc) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, inc) mlen 1 rlen 1 { align1 1Q }; (+f1.0) send(16) g122<1>UW g4<8,8,1>UD 0x0420a501 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, inc) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, inc) mlen 2 rlen 2 { align1 1H }; send(8) g6<1>UW g12<8,8,1>UD 0x084a4001 sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 4 { align1 1Q }; send(8) g98<1>UW g17<8,8,1>UD 0x0c43c001 @@ -333,7 +333,7 @@ send(16) g120<1>UW g2<8,8,1>UD 0x08449001 send(16) g32<1>UW g44<8,8,1>UD 0x0865a001 sampler MsgDesc: ld_lz SIMD16 Surface = 1 Sampler = 0 mlen 4 rlen 6 { align1 1H }; send(16) null<1>UW g5<8,8,1>UD 0x04008502 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; send(8) g5<1>UW g3<8,8,1>UD 0x02427001 sampler MsgDesc: ld SIMD8 Surface = 1 Sampler = 0 mlen 1 rlen 4 { align1 1Q }; send(16) g8<1>UW g5<8,8,1>UD 0x04847001 @@ -411,9 +411,9 @@ send(8) g98<1>UD g1<8,8,1>UD 0x02180208 send(8) null<1>F g12<8,8,1>UD 0x0c0a0027 urb MsgDesc: 2 SIMD8 write per-slot mlen 6 rlen 0 { align1 1Q }; send(8) null<1>UW g126<0,1,0>UD 0x040a02fd - data MsgDesc: ( DC OWORD block write, 253, 2) mlen 2 rlen 0 { align1 1Q }; + hdc0 MsgDesc: ( DC OWORD block write, 253, 2) mlen 2 rlen 0 { align1 1Q }; send(8) g115<1>UW g115<0,1,0>UD 0x021802fd - data MsgDesc: ( DC OWORD block read, 253, 2) mlen 1 rlen 1 { align1 WE_all 1Q }; + hdc0 MsgDesc: ( DC OWORD block read, 253, 2) mlen 1 rlen 1 { align1 WE_all 1Q }; send(8) null<1>F g25<8,8,1>F 0x12080057 urb MsgDesc: 5 SIMD8 write mlen 9 rlen 0 { align1 1Q }; send(8) null<1>F g34<8,8,1>F 0x12080077 @@ -449,7 +449,7 @@ send(16) g120<1>UW g11<8,8,1>UD 0x04449001 send(8) g124<1>UW g3<8,8,1>UD 0x08427000 sampler MsgDesc: ld SIMD8 Surface = 0 Sampler = 0 mlen 4 rlen 4 { align1 1Q }; send(16) null<1>UW g40<8,8,1>UD 0x04008501 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; send(8) null<1>F g127<8,8,1>UD 0x82080007 urb MsgDesc: 0 SIMD8 write mlen 1 rlen 0 { align1 1Q EOT }; send(8) g124<1>UW g9<8,8,1>UD 0x0a4a8000 @@ -461,7 +461,7 @@ send(16) g4<1>UW g12<8,8,1>UD 0x0c65a001 send(8) g2<1>UW g16<8,8,1>UD 0x0e434001 sampler MsgDesc: sample_d_c SIMD8 Surface = 1 Sampler = 0 mlen 7 rlen 4 { align1 2Q }; (+f1.0) send(8) null<1>UW g4<8,8,1>UD 0x02009501 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, inc) mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, inc) mlen 1 rlen 0 { align1 1Q }; send(8) g6<1>UW g9<8,8,1>UD 0x08434001 sampler MsgDesc: sample_d_c SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 4 { align1 1Q }; send(8) null<1>F g102<8,8,1>F 0x120801f7 @@ -471,7 +471,7 @@ send(8) null<1>F g121<8,8,1>F 0x8a080217 send(16) null<1>UW g3<0,1,0>UD 0x02008004 gateway MsgDesc: (barrier msg) mlen 1 rlen 0 { align1 WE_all 1H }; send(16) g3<1>UW g14<8,8,1>UD 0x04205efe - dp data 1 MsgDesc: ( untyped surface read, Surface = 254, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 254, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; send(8) null<1>F g30<8,8,1>F 0x140a0027 urb MsgDesc: 2 SIMD8 write per-slot mlen 10 rlen 0 { align1 1Q }; send(8) null<1>F g40<8,8,1>F 0x0c0a0047 @@ -479,9 +479,9 @@ send(8) null<1>F g40<8,8,1>F 0x0c0a0047 send(8) null<1>F g126<8,8,1>UD 0x84080007 urb MsgDesc: 0 SIMD8 write mlen 2 rlen 0 { align1 1Q EOT }; send(8) g5<1>UW g11<8,8,1>UD 0x04415001 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 2 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 2 rlen 4 { align1 1Q }; send(8) g2<1>UW g3<8,8,1>UD 0x04416001 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 2 rlen 4 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 2 rlen 4 { align1 2Q }; send(8) g13<1>UD g3<8,8,1>UD 0x02480038 urb MsgDesc: 3 SIMD8 read mlen 1 rlen 4 { align1 1Q }; send(8) null<1>F g7<8,8,1>F 0x140a0037 @@ -519,9 +519,9 @@ send(8) null<1>F g119<8,8,1>F 0x920800b7 send(8) g6<1>UW g8<8,8,1>UD 0x084b0000 sampler MsgDesc: gather4_c SIMD8 Surface = 0 Sampler = 0 mlen 4 rlen 4 { align1 1Q }; send(8) g7<1>UW g0<8,8,1>UD 0x02200008 - pixel interp MsgDesc: (persp, per_message_offset, 0x08) mlen 1 rlen 2 { align1 1Q }; + pi MsgDesc: (persp, per_message_offset, 0x08) mlen 1 rlen 2 { align1 1Q }; send(16) g9<1>UW g0<8,8,1>UD 0x02410008 - pixel interp MsgDesc: (persp, per_message_offset, 0x08) mlen 1 rlen 4 { align1 1H }; + pi MsgDesc: (persp, per_message_offset, 0x08) mlen 1 rlen 4 { align1 1H }; send(8) g2<1>UW g11<8,8,1>UD 0x0443d001 sampler MsgDesc: ld_mcs SIMD8 Surface = 1 Sampler = 0 mlen 2 rlen 4 { align1 1Q }; send(8) g2<1>UW g9<8,8,1>UD 0x0843e001 @@ -607,7 +607,7 @@ send(8) g3<1>UW g11<8,8,1>UD 0x0a43c001 send(16) g16<1>UW g5<8,8,1>UD 0x1485c001 sampler MsgDesc: ld2dms_w SIMD16 Surface = 1 Sampler = 0 mlen 10 rlen 8 { align1 1H }; send(16) g4<1>UD g13<0,1,0>UD 0x02280301 - const MsgDesc: (1, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; + hdc:ro MsgDesc: (1, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; send(8) g2<1>UW g2<8,8,1>UD 0x0443a001 sampler MsgDesc: ld_lz SIMD8 Surface = 1 Sampler = 0 mlen 2 rlen 4 { align1 1Q }; send(16) g2<1>UW g10<8,8,1>UD 0x0885a001 @@ -677,9 +677,9 @@ send(8) null<1>F g6<8,8,1>F 0x0a080017 send(8) null<1>F g7<8,8,1>F 0x0a080057 urb MsgDesc: 5 SIMD8 write mlen 5 rlen 0 { align1 1Q }; send(8) g4<1>UW g2<8,8,1>UD 0x02406001 - dp data 1 MsgDesc: ( untyped surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; send(16) g5<1>UW g2<8,8,1>UD 0x04805001 - dp data 1 MsgDesc: ( untyped surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 2 rlen 8 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 2 rlen 8 { align1 1H }; send(8) g124<1>UW g13<8,8,1>UD 0x084b0001 sampler MsgDesc: gather4_c SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 4 { align1 1Q }; send(16) g120<1>UW g7<8,8,1>UD 0x0e8d0001 @@ -711,9 +711,9 @@ send(8) g64<1>UD g113<8,8,1>UD 0x02380058 send(8) null<1>F g119<8,8,1>F 0x92080047 urb MsgDesc: 4 SIMD8 write mlen 9 rlen 0 { align1 1Q EOT }; send(8) g5<1>UW g4<8,8,1>UD 0x06415001 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 3 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 3 rlen 4 { align1 1Q }; send(8) g2<1>UW g10<8,8,1>UD 0x06416001 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 3 rlen 4 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 3 rlen 4 { align1 2Q }; send(8) null<1>F g119<8,8,1>F 0x92080077 urb MsgDesc: 7 SIMD8 write mlen 9 rlen 0 { align1 1Q EOT }; send(8) g12<1>UD g8<4,4,1>UD 0x044a0038 @@ -749,9 +749,9 @@ send(16) g20<1>UW g22<8,8,1>UD 0x0c246001 send(16) g22<1>UW g28<8,8,1>UD 0x0c246102 sampler MsgDesc: sample_l_c SIMD16 Surface = 2 Sampler = 1 mlen 6 rlen 2 { align1 1H }; send(8) g4<1>UW g0<8,8,1>UD 0x02201000 - pixel interp MsgDesc: (persp, sample_position, 0x00) mlen 1 rlen 2 { align1 1Q }; + pi MsgDesc: (persp, sample_position, 0x00) mlen 1 rlen 2 { align1 1Q }; send(16) g6<1>UW g0<8,8,1>UD 0x02411000 - pixel interp MsgDesc: (persp, sample_position, 0x00) mlen 1 rlen 4 { align1 1H }; + pi MsgDesc: (persp, sample_position, 0x00) mlen 1 rlen 4 { align1 1H }; send(8) g124<1>UW g19<8,8,1>UD 0x0a4b0001 sampler MsgDesc: gather4_c SIMD8 Surface = 1 Sampler = 0 mlen 5 rlen 4 { align1 1Q }; send(16) g120<1>UW g7<8,8,1>UD 0x128d0001 @@ -905,7 +905,7 @@ send(16) g10<1>UW g26<8,8,1>UD 0x128c8304 send(8) g6<1>UW g15<8,8,1>UD 0x0e4a4001 sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 7 rlen 4 { align1 1Q }; send(16) null<1>UW g2<8,8,1>UD 0x04008601 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, dec) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, dec) mlen 2 rlen 0 { align1 1H }; send(8) g124<1>UW g2<8,8,1>UD 0x08422001 sampler MsgDesc: sample_l SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 4 { align1 1Q }; send(16) g120<1>UW g2<8,8,1>UD 0x10842001 @@ -997,19 +997,19 @@ send(8) g124<1>UW g6<8,8,1>UD 0x06320001 send(16) g120<1>UW g8<8,8,1>UD 0x0c640001 sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 6 rlen 6 { align1 1H }; send(8) g124<1>UW g2<8,8,1>UD 0x02406000 - dp data 1 MsgDesc: ( untyped surface read, Surface = 0, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 0, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; send(8) g127<1>UW g6<8,8,1>UD 0x06120001 sampler MsgDesc: sample SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 1 { align1 1Q }; send(16) g126<1>UW g8<8,8,1>UD 0x0c240001 sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 6 rlen 2 { align1 1H }; send(8) g23<1>UW g2<8,8,1>UD 0x04115e01 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0xe) mlen 2 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0xe) mlen 2 rlen 1 { align1 1Q }; send(8) g39<1>UW g45<8,8,1>UD 0x04116e01 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0xe) mlen 2 rlen 1 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0xe) mlen 2 rlen 1 { align1 2Q }; (+f1.0) send(8) null<1>UW g2<8,8,1>UD 0x04018501 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, inc) mlen 2 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, inc) mlen 2 rlen 0 { align1 1Q }; (+f1.0) send(8) null<1>UW g42<8,8,1>UD 0x04019501 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, inc) mlen 2 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, inc) mlen 2 rlen 0 { align1 2Q }; send(8) g2<1>UW g6<8,8,1>UD 0x04423001 sampler MsgDesc: sample_c SIMD8 Surface = 1 Sampler = 0 mlen 2 rlen 4 { align1 1Q }; send(8) g6<1>UW g8<8,8,1>UD 0x04423102 @@ -1161,17 +1161,17 @@ send(8) g5<1>UW g15<8,8,1>UD 0x04420203 send(16) g7<1>UW g27<8,8,1>UD 0x08840203 sampler MsgDesc: sample SIMD16 Surface = 3 Sampler = 2 mlen 4 rlen 8 { align1 1H }; send(16) g4<1>UW g17<8,8,1>UD 0x0420a503 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 3, SIMD16, inc) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 3, SIMD16, inc) mlen 2 rlen 2 { align1 1H }; send(16) null<1>UW g18<8,8,1>UD 0x04008504 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 4, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 4, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; send(16) g11<1>UW g19<8,8,1>UD 0x0420a602 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, dec) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, dec) mlen 2 rlen 2 { align1 1H }; send(16) null<1>UW g20<8,8,1>UD 0x04008505 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 5, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 5, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; send(16) g16<1>UW g21<8,8,1>UD 0x04205e01 - dp data 1 MsgDesc: ( untyped surface read, Surface = 1, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 1, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; send(16) null<1>UW g22<8,8,1>UD 0x04008506 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 6, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 6, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; send(8) g26<1>UW g26<8,8,1>UD 0x0242a203 sampler MsgDesc: resinfo SIMD8 Surface = 3 Sampler = 2 mlen 1 rlen 4 { align1 1Q }; send(8) g30<1>UW g30<8,8,1>UD 0x0242a304 @@ -1221,7 +1221,7 @@ send(16) g66<1>UW g74<8,8,1>UD 0x0484a809 send(16) g74<1>UW g108<8,8,1>UD 0x0484a90a sampler MsgDesc: resinfo SIMD16 Surface = 10 Sampler = 9 mlen 2 rlen 8 { align1 1H }; send(16) null<1>UW g3<8,8,1>UD 0x040085fe - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; send(8) null<1>F g119<8,8,1>F 0x92080067 urb MsgDesc: 6 SIMD8 write mlen 9 rlen 0 { align1 1Q EOT }; send(8) g6<1>UW g20<8,8,1>UD 0x12424001 @@ -1233,9 +1233,9 @@ send(16) g2<1>UW g7<8,8,1>UD 0x0825a001 send(8) g9<1>UW g17<8,8,1>UD 0x06422000 sampler MsgDesc: sample_l SIMD8 Surface = 0 Sampler = 0 mlen 3 rlen 4 { align1 1Q }; send(16) null<1>UW g123<0,1,0>UD 0x060a03fd - data MsgDesc: ( DC OWORD block write, 253, 3) mlen 3 rlen 0 { align1 1H }; + hdc0 MsgDesc: ( DC OWORD block write, 253, 3) mlen 3 rlen 0 { align1 1H }; send(16) g114<1>UW g114<0,1,0>UD 0x022803fd - data MsgDesc: ( DC OWORD block read, 253, 3) mlen 1 rlen 2 { align1 WE_all 1H }; + hdc0 MsgDesc: ( DC OWORD block read, 253, 3) mlen 1 rlen 2 { align1 WE_all 1H }; send(8) null<1>F g12<8,8,1>UD 0x0c0a0127 urb MsgDesc: 18 SIMD8 write per-slot mlen 6 rlen 0 { align1 1Q }; send(8) g2<1>UW g11<8,8,1>UD 0x04420405 @@ -1373,9 +1373,9 @@ send(8) g5<1>UW g10<8,8,1>UD 0x06420001 send(16) g7<1>UW g19<8,8,1>UD 0x0c840001 sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 6 rlen 8 { align1 1H }; send(8) g1<1>UW g125<8,8,1>UD 0x02106e02 - dp data 1 MsgDesc: ( untyped surface read, Surface = 2, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 2, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(8) g8<1>UW g22<8,8,1>UD 0x02106efe - dp data 1 MsgDesc: ( untyped surface read, Surface = 254, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 254, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(8) null<1>F g123<8,8,1>F 0x8a080097 urb MsgDesc: 9 SIMD8 write mlen 5 rlen 0 { align1 1Q EOT }; send(8) g29<1>UW g5<8,8,1>UD 0x0e4b2001 @@ -1459,7 +1459,7 @@ send(16) g85<1>UW g2<8,8,1>UD 0x0885a60e send(16) g77<1>UW g2<8,8,1>UD 0x0885a70f sampler MsgDesc: ld_lz SIMD16 Surface = 15 Sampler = 7 mlen 4 rlen 8 { align1 1H }; send(16) g83<1>UW g86<8,8,1>UD 0x04205e00 - dp data 1 MsgDesc: ( untyped surface read, Surface = 0, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 0, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; send(8) null<1>F g122<8,8,1>F 0x8c0a0047 urb MsgDesc: 4 SIMD8 write per-slot mlen 6 rlen 0 { align1 1Q EOT }; send(8) g14<1>UW g11<8,8,1>UD 0x084b0202 @@ -1725,11 +1725,11 @@ send(8) null<1>F g40<8,8,1>UD 0x0c0a8207 send(8) null<1>F g41<8,8,1>UD 0x0c0a8217 urb MsgDesc: 33 SIMD8 write per-slot masked mlen 6 rlen 0 { align1 1Q }; send(8) g124<1>UW g2<8,8,1>UD 0x02106e01 - dp data 1 MsgDesc: ( untyped surface read, Surface = 1, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 1, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(16) g11<1>UW g19<8,8,1>UD 0x0420a601 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, dec) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, dec) mlen 2 rlen 2 { align1 1H }; send(16) null<1>UW g20<8,8,1>UD 0x04008503 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 3, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 3, SIMD16, inc) mlen 2 rlen 0 { align1 1H }; send(8) g17<1>UW g11<8,8,1>UD 0x0813e001 sampler MsgDesc: ld2dms SIMD8 Surface = 1 Sampler = 0 mlen 4 rlen 1 { align1 1Q }; send(16) g22<1>UW g2<8,8,1>UD 0x1025e001 @@ -1763,9 +1763,9 @@ send(8) g2<1>UW g8<8,8,1>UD 0x02420001 send(16) g2<1>UW g15<8,8,1>UD 0x04840001 sampler MsgDesc: sample SIMD16 Surface = 1 Sampler = 0 mlen 2 rlen 8 { align1 1H }; send(8) g7<1>UW g44<8,8,1>UD 0x02106e00 - dp data 1 MsgDesc: ( untyped surface read, Surface = 0, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 0, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(8) null<1>UW g44<8,8,1>UD 0x02009500 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, inc) mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, inc) mlen 1 rlen 0 { align1 1Q }; send(8) g7<1>UD g37<8,8,1>UD 0x02480438 urb MsgDesc: 67 SIMD8 read mlen 1 rlen 4 { align1 1Q }; send(8) g11<1>UD g37<8,8,1>UD 0x02480638 @@ -1909,9 +1909,9 @@ send(16) g2<1>UW g11<8,8,1>UD 0x10846001 send(16) g10<1>UW g19<8,8,1>UD 0x10846102 sampler MsgDesc: sample_l_c SIMD16 Surface = 2 Sampler = 1 mlen 8 rlen 8 { align1 1H }; (+f1.0) send(8) g4<1>UW g10<8,8,1>UD 0x0210b502 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, inc) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, inc) mlen 1 rlen 1 { align1 1Q }; (+f1.0) send(16) g5<1>UW g13<8,8,1>UD 0x0420a502 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, inc) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, inc) mlen 2 rlen 2 { align1 1H }; send(8) g8<1>UW g9<8,8,1>UD 0x06321001 sampler MsgDesc: sample_b SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 3 { align1 1Q }; send(16) g2<1>UW g14<8,8,1>UD 0x0c641001 @@ -1933,7 +1933,7 @@ send(8) null<1>F g12<8,8,1>UD 0x0e0a80a7 send(16) g9<1>UW g17<8,8,1>UD 0x04847002 sampler MsgDesc: ld SIMD16 Surface = 2 Sampler = 0 mlen 2 rlen 8 { align1 1H }; send(16) g23<1>UW g32<8,8,1>UD 0x04205e02 - dp data 1 MsgDesc: ( untyped surface read, Surface = 2, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 2, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; send(8) g8<1>UD g1<8,8,1>UD 0x02280068 urb MsgDesc: 6 SIMD8 read mlen 1 rlen 2 { align1 1Q }; send(8) g8<1>UD g1<8,8,1>UD 0x02280088 @@ -1985,21 +1985,21 @@ send(8) g8<1>UD g1<8,8,1>UD 0x022801f8 send(8) g8<1>UD g1<8,8,1>UD 0x02280208 urb MsgDesc: 32 SIMD8 read mlen 1 rlen 2 { align1 1Q }; send(8) g2<1>UW g3<8,8,1>UD 0x04203000 - pixel interp MsgDesc: (persp, per_slot_offset, 0x00) mlen 2 rlen 2 { align1 1Q }; + pi MsgDesc: (persp, per_slot_offset, 0x00) mlen 2 rlen 2 { align1 1Q }; send(16) g2<1>UW g11<8,8,1>UD 0x08413000 - pixel interp MsgDesc: (persp, per_slot_offset, 0x00) mlen 4 rlen 4 { align1 1H }; + pi MsgDesc: (persp, per_slot_offset, 0x00) mlen 4 rlen 4 { align1 1H }; send(8) g2<1>UW g0<8,8,1>UD 0x02201010 - pixel interp MsgDesc: (persp, sample_position, 0x10) mlen 1 rlen 2 { align1 1Q }; + pi MsgDesc: (persp, sample_position, 0x10) mlen 1 rlen 2 { align1 1Q }; send(16) g2<1>UW g0<8,8,1>UD 0x02411010 - pixel interp MsgDesc: (persp, sample_position, 0x10) mlen 1 rlen 4 { align1 1H }; + pi MsgDesc: (persp, sample_position, 0x10) mlen 1 rlen 4 { align1 1H }; send(8) g2<1>UW g0<8,8,1>UD 0x02201020 - pixel interp MsgDesc: (persp, sample_position, 0x20) mlen 1 rlen 2 { align1 1Q }; + pi MsgDesc: (persp, sample_position, 0x20) mlen 1 rlen 2 { align1 1Q }; send(16) g2<1>UW g0<8,8,1>UD 0x02411020 - pixel interp MsgDesc: (persp, sample_position, 0x20) mlen 1 rlen 4 { align1 1H }; + pi MsgDesc: (persp, sample_position, 0x20) mlen 1 rlen 4 { align1 1H }; send(8) g2<1>UW g0<8,8,1>UD 0x02201030 - pixel interp MsgDesc: (persp, sample_position, 0x30) mlen 1 rlen 2 { align1 1Q }; + pi MsgDesc: (persp, sample_position, 0x30) mlen 1 rlen 2 { align1 1Q }; send(16) g2<1>UW g0<8,8,1>UD 0x02411030 - pixel interp MsgDesc: (persp, sample_position, 0x30) mlen 1 rlen 4 { align1 1H }; + pi MsgDesc: (persp, sample_position, 0x30) mlen 1 rlen 4 { align1 1H }; send(8) g20<1>UW g15<8,8,1>UD 0x04320203 sampler MsgDesc: sample SIMD8 Surface = 3 Sampler = 2 mlen 2 rlen 3 { align1 1Q }; send(8) g11<1>UW g26<8,8,1>UD 0x04320405 @@ -2013,15 +2013,15 @@ send(16) g12<1>UW g48<8,8,1>UD 0x08640405 send(16) g38<1>UW g44<8,8,1>UD 0x08640304 sampler MsgDesc: sample SIMD16 Surface = 4 Sampler = 3 mlen 4 rlen 6 { align1 1H }; (+f1.0) send(8) null<1>UW g94<8,8,1>UD 0x02009601 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, dec) mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, dec) mlen 1 rlen 0 { align1 1Q }; (+f1.0) send(8) g47<1>UW g94<8,8,1>UD 0x0210b601 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, dec) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, dec) mlen 1 rlen 1 { align1 1Q }; send(16) g4<1>UW g1<8,8,1>UD 0x04405c02 - dp data 1 MsgDesc: ( untyped surface read, Surface = 2, SIMD16, Mask = 0xc) mlen 2 rlen 4 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 2, SIMD16, Mask = 0xc) mlen 2 rlen 4 { align1 1H }; send(8) null<1>UW g100<8,8,1>UD 0x02009600 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, dec) mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, dec) mlen 1 rlen 0 { align1 1Q }; send(8) g51<1>UW g100<8,8,1>UD 0x0210b600 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, dec) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, dec) mlen 1 rlen 1 { align1 1Q }; send(8) g5<1>UW g11<8,8,1>UD 0x064a0001 sampler MsgDesc: sample SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 4 { align1 1Q }; send(16) g7<1>UW g19<8,8,1>UD 0x0a8c0001 @@ -2029,11 +2029,11 @@ send(16) g7<1>UW g19<8,8,1>UD 0x0a8c0001 send(8) null<1>F g123<8,8,1>F 0x8a080117 urb MsgDesc: 17 SIMD8 write mlen 5 rlen 0 { align1 1Q EOT }; send(8) g3<1>UW g3<8,8,1>UD 0x02415002 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD16, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD16, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; send(8) g5<1>UW g4<8,8,1>UD 0x02416002 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 2Q }; send(8) g6<1>UW g16<8,8,1>UD 0x0210b500 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, inc) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, inc) mlen 1 rlen 1 { align1 1Q }; send(8) null<1>F g119<8,8,1>F 0x92080097 urb MsgDesc: 9 SIMD8 write mlen 9 rlen 0 { align1 1Q EOT }; send(8) null<1>F g4<8,8,1>F 0x120800c7 @@ -2063,7 +2063,7 @@ send(8) g14<1>UW g18<8,8,1>UD 0x08123102 send(16) g24<1>UW g32<8,8,1>UD 0x10243102 sampler MsgDesc: sample_c SIMD16 Surface = 2 Sampler = 1 mlen 8 rlen 2 { align1 1H }; send(8) g5<1>UW g5<8,8,1>UD 0x04415000 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0x0) mlen 2 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0x0) mlen 2 rlen 4 { align1 1Q }; send(8) g2<1>UD g9<8,8,1>UD 0x043a0028 urb MsgDesc: 2 SIMD8 read per-slot mlen 2 rlen 3 { align1 1Q }; send(8) g13<1>UD g1<8,8,1>UD 0x02380098 @@ -2087,9 +2087,9 @@ send(8) null<1>F g60<8,8,1>F 0x120800a7 send(8) null<1>F g119<8,8,1>F 0x92080107 urb MsgDesc: 16 SIMD8 write mlen 9 rlen 0 { align1 1Q EOT }; send(8) g3<1>UW g7<8,8,1>UD 0x02115e01 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(8) g5<1>UW g11<8,8,1>UD 0x02116e01 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 2Q }; send(8) null<1>F g123<8,8,1>F 0x8a080067 urb MsgDesc: 6 SIMD8 write mlen 5 rlen 0 { align1 1Q EOT }; send(8) null<1>F g80<8,8,1>F 0x140a00b7 @@ -2363,7 +2363,7 @@ send(8) null<1>F g38<8,8,1>UD 0x080a8207 send(8) null<1>F g39<8,8,1>UD 0x080a8217 urb MsgDesc: 33 SIMD8 write per-slot masked mlen 4 rlen 0 { align1 1Q }; send(8) g18<1>UW g19<8,8,1>UD 0x04115e00 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0xe) mlen 2 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0xe) mlen 2 rlen 1 { align1 1Q }; send(8) g2<1>UW g6<8,8,1>UD 0x0623d001 sampler MsgDesc: ld_mcs SIMD8 Surface = 1 Sampler = 0 mlen 3 rlen 2 { align1 1Q }; send(16) g2<1>UW g8<8,8,1>UD 0x0c45d001 @@ -2593,21 +2593,21 @@ send(8) null<1>F g38<8,8,1>UD 0x0c0a01e7 send(8) null<1>F g39<8,8,1>UD 0x0c0a01f7 urb MsgDesc: 31 SIMD8 write per-slot mlen 6 rlen 0 { align1 1Q }; send(16) g46<1>UD g12<0,1,0>UD 0x02280302 - const MsgDesc: (2, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; + hdc:ro MsgDesc: (2, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; send(16) g50<1>UD g15<0,1,0>UD 0x02280304 - const MsgDesc: (4, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; + hdc:ro MsgDesc: (4, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; send(16) g34<1>UD g20<0,1,0>UD 0x02280303 - const MsgDesc: (3, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; + hdc:ro MsgDesc: (3, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; send(16) g16<1>UD g21<0,1,0>UD 0x02280306 - const MsgDesc: (6, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; + hdc:ro MsgDesc: (6, 3, 0, 0) mlen 1 rlen 2 { align1 WE_all 1H }; send(8) g5<1>UW g19<8,8,1>UD 0x02106e03 - dp data 1 MsgDesc: ( untyped surface read, Surface = 3, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 3, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(8) g8<1>UW g21<8,8,1>UD 0x02106e04 - dp data 1 MsgDesc: ( untyped surface read, Surface = 4, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 4, SIMD8, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(16) g8<1>UW g34<8,8,1>UD 0x04205e03 - dp data 1 MsgDesc: ( untyped surface read, Surface = 3, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 3, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; send(16) g14<1>UW g37<8,8,1>UD 0x04205e04 - dp data 1 MsgDesc: ( untyped surface read, Surface = 4, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 4, SIMD16, Mask = 0xe) mlen 2 rlen 2 { align1 1H }; send(8) g15<1>UD g12<8,8,1>UD 0x041a0038 urb MsgDesc: 3 SIMD8 read per-slot mlen 2 rlen 1 { align1 1Q }; send(8) g2<1>UW g54<8,8,1>UD 0x0242a707 @@ -2725,9 +2725,9 @@ send(8) g8<1>UD g9<8,8,1>UD 0x02480008 send(8) null<1>F g123<8,8,1>F 0x8a080007 urb MsgDesc: 0 SIMD8 write mlen 5 rlen 0 { align1 1Q EOT }; send(8) g4<1>UW g2<8,8,1>UD 0x04215c01 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0xc) mlen 2 rlen 2 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0xc) mlen 2 rlen 2 { align1 1Q }; send(8) g40<1>UW g38<8,8,1>UD 0x04216c01 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0xc) mlen 2 rlen 2 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0xc) mlen 2 rlen 2 { align1 2Q }; send(8) g6<1>UW g11<8,8,1>UD 0x104a4001 sampler MsgDesc: sample_d SIMD8 Surface = 1 Sampler = 0 mlen 8 rlen 4 { align1 1Q }; send(8) g124<1>UW g2<8,8,1>UD 0x04422001 @@ -2745,17 +2745,17 @@ send(16) g10<1>UW g18<8,8,1>UD 0x0c845102 send(8) null<1>F g121<8,8,1>F 0x8a080197 urb MsgDesc: 25 SIMD8 write mlen 5 rlen 0 { align1 1Q EOT }; send(8) g124<1>UW g6<8,8,1>UD 0x02415000 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; send(8) g124<1>UW g6<8,8,1>UD 0x06415000 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0x0) mlen 3 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0x0) mlen 3 rlen 4 { align1 1Q }; send(8) g124<1>UW g6<8,8,1>UD 0x02215c00 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0xc) mlen 1 rlen 2 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0xc) mlen 1 rlen 2 { align1 1Q }; send(8) g17<1>UW g27<8,8,1>UD 0x02115e00 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 0, SIMD16, Mask = 0xe) mlen 1 rlen 1 { align1 1Q }; send(8) g124<1>UW g2<8,8,1>UD 0x02415001 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD16, Mask = 0x0) mlen 1 rlen 4 { align1 1Q }; send(8) g2<1>UW g29<8,8,1>UD 0x02416001 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 1, SIMD8, Mask = 0x0) mlen 1 rlen 4 { align1 2Q }; send(8) g9<1>UW g19<8,8,1>UD 0x0843e102 sampler MsgDesc: ld2dms SIMD8 Surface = 2 Sampler = 1 mlen 4 rlen 4 { align1 1Q }; send(16) g23<1>UW g7<8,8,1>UD 0x1085e102 @@ -2811,9 +2811,9 @@ send(16) g2<1>UW g11<8,8,1>UD 0x10845001 send(16) g10<1>UW g19<8,8,1>UD 0x10845102 sampler MsgDesc: sample_b_c SIMD16 Surface = 2 Sampler = 1 mlen 8 rlen 8 { align1 1H }; send(8) g124<1>UW g2<8,8,1>UD 0x02306801 - dp data 1 MsgDesc: ( untyped surface read, Surface = 1, SIMD8, Mask = 0x8) mlen 1 rlen 3 { align1 1Q }; + hdc1 MsgDesc: ( untyped surface read, Surface = 1, SIMD8, Mask = 0x8) mlen 1 rlen 3 { align1 1Q }; send(16) g120<1>UW g2<8,8,1>UD 0x04605801 - dp data 1 MsgDesc: ( untyped surface read, Surface = 1, SIMD16, Mask = 0x8) mlen 2 rlen 6 { align1 1H }; + hdc1 MsgDesc: ( untyped surface read, Surface = 1, SIMD16, Mask = 0x8) mlen 2 rlen 6 { align1 1H }; send(8) g8<1>UD g7<8,8,1>UD 0x043a0128 urb MsgDesc: 18 SIMD8 read per-slot mlen 2 rlen 3 { align1 1Q }; send(8) g12<1>UW g5<8,8,1>UD 0x0833e001 @@ -2971,9 +2971,9 @@ send(8) g5<1>UW g2<8,8,1>UD 0x04129001 send(16) g6<1>UW g2<8,8,1>UD 0x08249001 sampler MsgDesc: lod SIMD16 Surface = 1 Sampler = 0 mlen 4 rlen 2 { align1 1H }; send(8) g11<1>UW g4<8,8,1>UD 0x04415002 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD16, Mask = 0x0) mlen 2 rlen 4 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD16, Mask = 0x0) mlen 2 rlen 4 { align1 1Q }; send(8) g7<1>UW g5<8,8,1>UD 0x04416002 - dp data 1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD8, Mask = 0x0) mlen 2 rlen 4 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface read, Surface = 2, SIMD8, Mask = 0x0) mlen 2 rlen 4 { align1 2Q }; send(8) null<1>F g16<8,8,1>UD 0x0e0a8057 urb MsgDesc: 5 SIMD8 write per-slot masked mlen 7 rlen 0 { align1 1Q }; send(8) g6<1>UD g18<8,8,1>UD 0x043a0318 @@ -3183,9 +3183,9 @@ send(8) g9<1>UW g5<8,8,1>UD 0x04420002 send(16) g13<1>UW g7<8,8,1>UD 0x08840002 sampler MsgDesc: sample SIMD16 Surface = 2 Sampler = 0 mlen 4 rlen 8 { align1 1H }; (+f1.0) send(8) g124<1>UW g2<8,8,1>UD 0x0211a501 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, inc) mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, inc) mlen 1 rlen 1 { align1 1Q }; (+f1.0) send(8) g121<1>UW g3<8,8,1>UD 0x0211b501 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, inc) mlen 1 rlen 1 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, inc) mlen 1 rlen 1 { align1 2Q }; send(8) g22<1>UD g32<8,8,1>UD 0x02280238 urb MsgDesc: 35 SIMD8 read mlen 1 rlen 2 { align1 1Q }; send(8) g24<1>UD g32<8,8,1>UD 0x02280438 diff --git a/src/intel/compiler/tests/gen9/sendc.asm b/src/intel/compiler/tests/gen9/sendc.asm index c340cb510a6..2d216dfacf6 100644 --- a/src/intel/compiler/tests/gen9/sendc.asm +++ b/src/intel/compiler/tests/gen9/sendc.asm @@ -53,7 +53,7 @@ sendc(8) null<1>UW g123<8,8,1>UD 0x8a0a1001 sendc(16) null<1>UW g119<8,8,1>UD 0x920c1001 sampler MsgDesc: sample_b SIMD16 Surface = 1 Sampler = 0 mlen 9 rlen 0 { align1 1H EOT }; sendc(1) g2<1>UW g2<0,1,0>UW 0x0209c000 - data MsgDesc: ( DC mfence, 0, 0) mlen 1 rlen 0 { align1 WE_all 1N }; + hdc0 MsgDesc: ( DC mfence, 0, 0) mlen 1 rlen 0 { align1 WE_all 1N }; sendc(8) null<1>UW g120<8,8,1>UD 0x900b4001 sampler MsgDesc: sample_d_c SIMD8 Surface = 1 Sampler = 0 mlen 8 rlen 0 { align1 1Q EOT }; sendc(8) null<1>UW g123<8,8,1>UD 0x8a0b4001 diff --git a/src/intel/compiler/tests/gen9/sends.asm b/src/intel/compiler/tests/gen9/sends.asm index 9f7c8505c9c..17a06734349 100644 --- a/src/intel/compiler/tests/gen9/sends.asm +++ b/src/intel/compiler/tests/gen9/sends.asm @@ -1,268 +1,268 @@ sends(8) nullUD g34UD g36UD 0x04035001 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; sends(8) nullUD g1UD g3UD 0x04036001 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 2Q }; sends(8) nullUD g21UD g23UD 0x04035001 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(8) g9UD g2UD g3UD 0x0210b201 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, or) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, or) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(16) g11UD g2UD g6UD 0x0420a201 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, or) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, or) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; sends(16) nullUD g6UD g8UD 0x04025efe 0x00000080 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 254, SIMD16, Mask = 0xe) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 254, SIMD16, Mask = 0xe) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g10UD g12UD 0x040087fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, add) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, add) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(8) nullUD g11UD g5UD 0x04035002 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g2UD g11UD 0x04036002 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g3UD g4UD 0x02026001 0x00000100 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(16) nullUD g3UD g5UD 0x04025001 0x00000200 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 8 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 2 ex_mlen 8 rlen 0 { align1 1H }; sends(8) nullUD g2UD g3UD 0x02009b00 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, imin) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 0, SIMD8, imin) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04035e01 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g45UD g41UD 0x04036e01 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04018c01 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, umax) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, umax) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g45UD g41UD 0x04019c01 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, umax) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, umax) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04018401 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g45UD g41UD 0x04019401 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, mov) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, mov) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04018e01 0x00000080 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, cmpwr) mlen 2 ex_mlen 2 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, cmpwr) mlen 2 ex_mlen 2 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g11UD g13UD 0x04019e01 0x00000080 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, cmpwr) mlen 2 ex_mlen 2 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, cmpwr) mlen 2 ex_mlen 2 rlen 0 { align1 2Q }; sends(16) nullUD g3UD g1UD 0x04008dfe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, umin) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, umin) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g5UD g1UD 0x04008bfe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, imin) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, imin) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g3UD g1UD 0x04008cfe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, umax) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, umax) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g5UD g1UD 0x04008afe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, imax) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, imax) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g3UD g1UD 0x040081fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, and) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, and) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g3UD g1UD 0x040082fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, or) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, or) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g3UD g1UD 0x040083fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, xor) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, xor) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g3UD g1UD 0x040084fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, mov) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, mov) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(16) nullUD g3UD g7UD 0x04008efe 0x00000100 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, cmpwr) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, cmpwr) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; sends(16) g1UD g19UD g21UD 0x0420a4fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, mov) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, mov) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; sends(16) g13UD g23UD g25UD 0x0420a2fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, or) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, or) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; sends(8) nullUD g14UD g10UD 0x02026000 0x00000100 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 0, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 0, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; sends(8) nullUD g4UD g2UD 0x02026efe 0x00000040 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 254, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 254, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; sends(8) g7UD g19UD g20UD 0x0210bdfe 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g11UD g25UD g26UD 0x0210b4fe 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD8, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD8, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(16) g1UD g14UD g16UD 0x0420a7fe 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, add) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, add) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(8) nullUD g2UD g13UD a0<0>UD 0x00000100 - dp data 1 MsgDesc: indirect ex_mlen 4 { align1 1Q }; + hdc1 MsgDesc: indirect ex_mlen 4 { align1 1Q }; (+f1.0) sends(8) nullUD g5UD g6UD 0x02026e01 0x00000040 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g5UD g6UD 0x02026e02 0x00000040 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 2, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 2, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(16) nullUD g6UD g8UD 0x04025e01 0x00000080 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD16, Mask = 0xe) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD16, Mask = 0xe) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(16) nullUD g6UD g8UD 0x04025e02 0x00000080 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 2, SIMD16, Mask = 0xe) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 2, SIMD16, Mask = 0xe) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(8) g3UD g8UD g9UD 0x0210b702 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, add) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, add) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(16) g4UD g11UD g13UD 0x0420a702 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, add) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, add) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(8) nullUD g5UD g3UD 0x02026c01 0x00000080 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD8, Mask = 0xc) mlen 1 ex_mlen 2 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD8, Mask = 0xc) mlen 1 ex_mlen 2 rlen 0 { align1 1Q }; (+f1.0) sends(16) nullUD g19UD g21UD 0x04025c01 0x00000100 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD16, Mask = 0xc) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 1, SIMD16, Mask = 0xc) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; sends(8) nullUD g14UD g15UD 0x02026e00 0x00000040 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 0, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 0, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; sends(8) nullUD g16UD g9UD 0x02026c00 0x00000080 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 0, SIMD8, Mask = 0xc) mlen 1 ex_mlen 2 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 0, SIMD8, Mask = 0xc) mlen 1 ex_mlen 2 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g15UD g18UD 0x06035001 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 3 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 3 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g34UD g11UD 0x06036001 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 3 ex_mlen 4 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 3 ex_mlen 4 rlen 0 { align1 2Q }; (+f1.0) sends(8) g13UD g18UD g19UD 0x0210bb02 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, imin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, imin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g16UD g25UD g30UD 0x0210b402 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(16) g22UD g27UD g29UD 0x0420ab02 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, imin) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, imin) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(16) g25UD g37UD g2UD 0x0420a402 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, mov) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, mov) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; sends(16) nullUD g8UD g10UD 0x04025c02 0x00000100 - dp data 1 MsgDesc: ( DC untyped surface write, Surface = 2, SIMD16, Mask = 0xc) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped surface write, Surface = 2, SIMD16, Mask = 0xc) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; (+f1.0) sends(8) g127UD g2UD g9UD 0x0411a401 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g127UD g2UD g4UD 0x0411b401 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, mov) mlen 2 ex_mlen 1 rlen 1 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, mov) mlen 2 ex_mlen 1 rlen 1 { align1 2Q }; (+f1.0) sends(8) nullUD g14UD g15UD 0x02009201 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, or) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, or) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(16) nullUD g24UD g26UD 0x04008201 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, or) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, or) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(8) nullUD g124UD g11UD 0x04035000 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 0, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 0, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g5UD g6UD 0x02035e02 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g7UD g9UD 0x02036e02 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; sends(8) nullUD g11UD g21UD 0x04035e00 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 0, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 0, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; sends(8) nullUD g15UD g27UD 0x04035e02 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; sends(8) nullUD g16UD g28UD 0x04036e02 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) g13UD g19UD g20UD 0x0210bd02 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(16) g22UD g28UD g30UD 0x0420ad02 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, umin) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, umin) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04035c02 0x00000080 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0xc) mlen 2 ex_mlen 2 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0xc) mlen 2 ex_mlen 2 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g38UD g40UD 0x04036c02 0x00000080 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0xc) mlen 2 ex_mlen 2 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0xc) mlen 2 ex_mlen 2 rlen 0 { align1 2Q }; sends(8) nullUD g17UD g6UD 0x02035000 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 0, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 0, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; sends(8) g124UD g20UD g21UD 0x0211a700 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, add) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, add) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g124UD g20UD g21UD 0x0211ad00 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g124UD g20UD g21UD 0x0211ac00 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, umax) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, umax) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g124UD g20UD g21UD 0x0211a100 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, and) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, and) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g124UD g20UD g21UD 0x0211a200 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, or) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, or) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g124UD g20UD g21UD 0x0211a300 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, xor) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, xor) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g124UD g20UD g21UD 0x0211a400 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) g124UD g21UD g6UD 0x0211ae00 0x00000080 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, cmpwr) mlen 1 ex_mlen 2 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, cmpwr) mlen 1 ex_mlen 2 rlen 1 { align1 1Q }; (+f1.0) sends(8) nullUD g16UD g2UD 0x02035001 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g29UD g8UD 0x02036001 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g14UD g18UD 0x02035e01 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD16, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g23UD g7UD 0x02036e01 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 1, SIMD8, Mask = 0xe) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g17UD g2UD 0x02035002 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g28UD g3UD 0x02036002 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 2, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g17UD g2UD 0x02035003 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD16, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g23UD g6UD 0x02036003 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD8, Mask = 0x0) mlen 1 ex_mlen 4 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g12UD g13UD 0x02009701 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, add) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, add) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(16) nullUD g20UD g22UD 0x04008701 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, add) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, add) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; sends(8) g7UD g18UD g19UD 0x0210bbfe 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD8, imin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD8, imin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; sends(8) nullUD g6UD g1UD 0x04035003 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD16, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 1Q }; sends(8) nullUD g8UD g10UD 0x04036003 0x00000100 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD8, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 3, SIMD8, Mask = 0x0) mlen 2 ex_mlen 4 rlen 0 { align1 2Q }; (+f1.0) sends(8) g3UD g21UD g20UD 0x0210b701 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, add) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, add) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g5UD g21UD g20UD 0x0210bd01 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g6UD g21UD g20UD 0x0210bc01 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umax) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umax) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g7UD g21UD g20UD 0x0210b101 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, and) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, and) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g9UD g21UD g20UD 0x0210b301 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, xor) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, xor) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g10UD g21UD g20UD 0x0210b401 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, mov) mlen 1 ex_mlen 1 rlen 1 { align1 1Q }; (+f1.0) sends(8) g11UD g21UD g11UD 0x0210be01 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, cmpwr) mlen 1 ex_mlen 2 rlen 1 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, cmpwr) mlen 1 ex_mlen 2 rlen 1 { align1 1Q }; (+f1.0) sends(16) g3UD g38UD g36UD 0x0420a701 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, add) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, add) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(16) g7UD g38UD g36UD 0x0420ad01 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(16) g9UD g38UD g36UD 0x0420ac01 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umax) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umax) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(16) g11UD g38UD g36UD 0x0420a101 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, and) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, and) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(16) g15UD g38UD g36UD 0x0420a301 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, xor) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, xor) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(16) g17UD g38UD g36UD 0x0420a401 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 2 rlen 2 { align1 1H }; (+f1.0) sends(16) g19UD g38UD g21UD 0x0420ae01 0x00000100 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, cmpwr) mlen 2 ex_mlen 4 rlen 2 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, cmpwr) mlen 2 ex_mlen 4 rlen 2 { align1 1H }; sends(8) nullUD g4UD g12UD 0x04035e09 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 9, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 9, SIMD16, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; sends(8) nullUD g5UD g13UD 0x04036e09 0x00000040 - dp data 1 MsgDesc: ( DC typed surface write, Surface = 9, SIMD8, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed surface write, Surface = 9, SIMD8, Mask = 0xe) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g14UD g18UD 0x02009d01 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g17UD g19UD 0x02009c01 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umax) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umax) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g19UD g20UD 0x02009101 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, and) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, and) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g27UD g22UD 0x02009301 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, xor) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, xor) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g29UD g23UD 0x02009401 0x00000040 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, mov) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, mov) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g32UD g2UD 0x02009e01 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, cmpwr) mlen 1 ex_mlen 2 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, cmpwr) mlen 1 ex_mlen 2 rlen 0 { align1 1Q }; (+f1.0) sends(16) nullUD g18UD g32UD 0x04008d01 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(16) nullUD g24UD g33UD 0x04008c01 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umax) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umax) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(16) nullUD g30UD g34UD 0x04008101 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, and) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, and) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(16) nullUD g46UD g36UD 0x04008301 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, xor) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, xor) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(16) nullUD g49UD g37UD 0x04008401 0x00000080 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, mov) mlen 2 ex_mlen 2 rlen 0 { align1 1H }; (+f1.0) sends(16) nullUD g56UD g2UD 0x04008e01 0x00000100 - dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, cmpwr) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; + hdc1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, cmpwr) mlen 2 ex_mlen 4 rlen 0 { align1 1H }; (+f1.0) sends(8) nullUD g20UD g21UD 0x02018101 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, and) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, and) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g3UD g38UD 0x02019101 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, and) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, and) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g19UD g20UD 0x02018201 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, or) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, or) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g3UD g36UD 0x02019201 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, or) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, or) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g19UD g20UD 0x02018301 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, xor) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, xor) mlen 1 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g3UD g36UD 0x02019301 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, xor) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, xor) mlen 1 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g18UD 0x04018701 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, add) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, add) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04019701 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, add) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, add) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g18UD 0x04018d01 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04019d01 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, umin) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, umin) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g18UD 0x04018101 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, and) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, and) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04019101 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, and) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, and) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g18UD 0x04018201 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, or) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, or) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04019201 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, or) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, or) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; (+f1.0) sends(8) nullUD g2UD g18UD 0x04018301 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, xor) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, xor) mlen 2 ex_mlen 1 rlen 0 { align1 1Q }; (+f1.0) sends(8) nullUD g2UD g4UD 0x04019301 0x00000040 - dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, xor) mlen 2 ex_mlen 1 rlen 0 { align1 2Q }; + hdc1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, xor) mlen 2 ex_mlen 1 rlen 0 { align1 2Q };