From 87c167e2f48486432b4f73a67e38b5462ca6c65e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 5 Feb 2023 00:13:50 -0500 Subject: [PATCH] radeonsi/gfx11: fix the CU_EN clear mask for RSRC4_GS Fixes: 9fecac091f3 - radeonsi/gfx11: scattered register deltas Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: (cherry picked from commit 31438fbab5674147662170bc13d66389cecb35ad) --- .pick_status.json | 2 +- src/gallium/drivers/radeonsi/si_state_shaders.cpp | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 41de1578cba..099af4c8341 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -6232,7 +6232,7 @@ "description": "radeonsi/gfx11: fix the CU_EN clear mask for RSRC4_GS", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "9fecac091f3159eb50a3e3dea2312218bb87d8c1" }, diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp index a52bd78ec6c..b3c0f85a3b1 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp +++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp @@ -1234,7 +1234,8 @@ static void gfx10_emit_shader_ngg_tail(struct si_context *sctx, struct si_shader (sctx->gfx_level >= GFX10 ? radeon_set_sh_reg_idx3_func : radeon_set_sh_reg_func)); ac_set_reg_cu_en(&sctx->gfx_cs, R_00B204_SPI_SHADER_PGM_RSRC4_GS, shader->ctx_reg.ngg.spi_shader_pgm_rsrc4_gs, - C_00B204_CU_EN_GFX10, 16, &sctx->screen->info, + sctx->gfx_level >= GFX11 ? C_00B204_CU_EN_GFX11 : C_00B204_CU_EN_GFX10, 16, + &sctx->screen->info, (void (*)(void*, unsigned, uint32_t)) (sctx->gfx_level >= GFX10 ? radeon_set_sh_reg_idx3_func : radeon_set_sh_reg_func)); sctx->tracked_regs.reg_saved &= ~BITFIELD64_BIT(SI_TRACKED_SPI_SHADER_PGM_RSRC4_GS) &