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radeonsi: move most si_surface color fields into new si_cb_surface_info
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39260>
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parent
1c63f9e46f
commit
87a704ad4b
2 changed files with 43 additions and 42 deletions
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@ -443,23 +443,7 @@ struct si_auxiliary_texture {
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uint32_t stride;
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};
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struct si_surface {
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struct pipe_surface base;
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/* These can vary with block-compressed textures. */
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unsigned width0;
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unsigned height0;
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bool color_initialized : 1;
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bool depth_initialized : 1;
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/* Misc. color flags. */
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bool color_is_int8 : 1;
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bool color_is_int10 : 1;
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bool dcc_incompatible : 1;
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uint8_t db_format_index : 3;
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/* Color registers. */
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struct si_cb_surface_info {
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struct ac_cb_surface cb;
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unsigned spi_shader_col_format : 8; /* no blending, no alpha-to-coverage. */
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@ -467,7 +451,21 @@ struct si_surface {
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unsigned spi_shader_col_format_blend : 8; /* blending without alpha. */
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unsigned spi_shader_col_format_blend_alpha : 8; /* blending with alpha. */
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/* DB registers. */
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bool color_is_int8 : 1;
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bool color_is_int10 : 1;
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};
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struct si_surface {
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struct pipe_surface base;
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/* These can vary with block-compressed textures. */
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unsigned width0;
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unsigned height0;
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bool depth_initialized : 1;
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bool dcc_incompatible : 1;
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uint8_t db_format_index : 3;
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struct ac_ds_surface ds;
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};
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@ -755,6 +753,7 @@ struct si_images {
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struct si_framebuffer {
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struct pipe_framebuffer_state state;
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struct si_cb_surface_info cb[8];
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PIPE_FB_SURFACES; //STOP USING THIS
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unsigned colorbuf_enabled_4bit;
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unsigned spi_shader_col_format;
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@ -104,10 +104,12 @@ static void si_emit_cb_render_state(struct si_context *sctx, unsigned index)
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blend->cb_target_enabled_4bit) / 4;
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for (i = 0; i < num_cbufs; i++) {
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struct si_surface *surf = (struct si_surface *)sctx->framebuffer.fb_cbufs[i];
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bool has_surf = sctx->framebuffer.state.cbufs[i].texture != NULL;
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ac_set_sx_downconvert_state_for_mrt(sctx->gfx_level, !surf, surf ? surf->cb.cb_color_info : 0,
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surf ? surf->cb.cb_color_attrib : 0, spi_shader_col_format,
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ac_set_sx_downconvert_state_for_mrt(sctx->gfx_level, !has_surf,
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has_surf ? sctx->framebuffer.cb[i].cb.cb_color_info : 0,
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has_surf ? sctx->framebuffer.cb[i].cb.cb_color_attrib : 0,
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spi_shader_col_format,
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cb_target_mask, i, &sx_ps_downconvert,
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&sx_blend_opt_epsilon, &sx_blend_opt_control,
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&cb_target_mask);
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@ -2297,10 +2299,13 @@ static bool si_is_format_supported(struct pipe_screen *screen, enum pipe_format
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static void si_initialize_color_surface(struct si_context *sctx, unsigned i)
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{
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struct si_cb_surface_info *cb = &sctx->framebuffer.cb[i];
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struct si_surface *surf = (struct si_surface *)sctx->framebuffer.fb_cbufs[i];
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struct si_texture *tex = (struct si_texture *)surf->base.texture;
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unsigned format, swap, ntype;//, endian;
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memset(cb, 0, sizeof(*cb));
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ntype = ac_get_cb_number_type(surf->base.format);
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format = ac_get_cb_format(sctx->gfx_level, surf->base.format);
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@ -2313,9 +2318,9 @@ static void si_initialize_color_surface(struct si_context *sctx, unsigned i)
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if (ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT) {
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if (format == V_028C70_COLOR_8 || format == V_028C70_COLOR_8_8 ||
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format == V_028C70_COLOR_8_8_8_8)
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surf->color_is_int8 = true;
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cb->color_is_int8 = true;
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else if (format == V_028C70_COLOR_10_10_10_2 || format == V_028C70_COLOR_2_10_10_10)
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surf->color_is_int10 = true;
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cb->color_is_int10 = true;
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}
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const struct ac_cb_state cb_state = {
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@ -2332,18 +2337,17 @@ static void si_initialize_color_surface(struct si_context *sctx, unsigned i)
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.num_levels = tex->buffer.b.b.last_level + 1,
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};
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ac_init_cb_surface(&sctx->screen->info, &cb_state, &surf->cb);
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ac_init_cb_surface(&sctx->screen->info, &cb_state, &cb->cb);
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/* Determine pixel shader export format */
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struct ac_spi_color_formats formats = {};
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const bool rbplus = sctx->screen->info.rbplus_allowed;
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ac_choose_spi_color_formats(format, swap, ntype, tex->is_depth, rbplus, &formats);
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surf->spi_shader_col_format = formats.normal;
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surf->spi_shader_col_format_alpha = formats.alpha;
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surf->spi_shader_col_format_blend = formats.blend;
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surf->spi_shader_col_format_blend_alpha = formats.blend_alpha;
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surf->color_initialized = true;
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cb->spi_shader_col_format = formats.normal;
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cb->spi_shader_col_format_alpha = formats.alpha;
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cb->spi_shader_col_format_blend = formats.blend;
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cb->spi_shader_col_format_blend_alpha = formats.blend_alpha;
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}
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static void si_init_depth_surface(struct si_context *sctx)
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@ -2533,24 +2537,22 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
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if (!state->cbufs[i].texture)
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continue;
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struct si_cb_surface_info *cb = &sctx->framebuffer.cb[i];
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struct pipe_surface *psurf = &sctx->framebuffer.state.cbufs[i];
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surf = (struct si_surface *)sctx->framebuffer.fb_cbufs[i];
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tex = (struct si_texture *)sctx->framebuffer.state.cbufs[i].texture;
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if (!surf->color_initialized) {
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si_initialize_color_surface(sctx, i);
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}
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si_initialize_color_surface(sctx, i);
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sctx->framebuffer.colorbuf_enabled_4bit |= 0xf << (i * 4);
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sctx->framebuffer.spi_shader_col_format |= surf->spi_shader_col_format << (i * 4);
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sctx->framebuffer.spi_shader_col_format_alpha |= surf->spi_shader_col_format_alpha << (i * 4);
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sctx->framebuffer.spi_shader_col_format_blend |= surf->spi_shader_col_format_blend << (i * 4);
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sctx->framebuffer.spi_shader_col_format_blend_alpha |= surf->spi_shader_col_format_blend_alpha
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sctx->framebuffer.spi_shader_col_format |= cb->spi_shader_col_format << (i * 4);
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sctx->framebuffer.spi_shader_col_format_alpha |= cb->spi_shader_col_format_alpha << (i * 4);
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sctx->framebuffer.spi_shader_col_format_blend |= cb->spi_shader_col_format_blend << (i * 4);
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sctx->framebuffer.spi_shader_col_format_blend_alpha |= cb->spi_shader_col_format_blend_alpha
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<< (i * 4);
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if (surf->color_is_int8)
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if (cb->color_is_int8)
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sctx->framebuffer.color_is_int8 |= 1 << i;
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if (surf->color_is_int10)
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if (cb->color_is_int10)
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sctx->framebuffer.color_is_int10 |= 1 << i;
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if (tex->surface.fmask_offset)
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@ -2743,7 +2745,7 @@ static void gfx6_emit_framebuffer_state(struct si_context *sctx, unsigned index)
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/* Compute mutable surface parameters. */
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const struct ac_mutable_cb_state mutable_cb_state = {
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.surf = &tex->surface,
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.cb = &cb->cb,
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.cb = &sctx->framebuffer.cb[i].cb,
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.va = tex->buffer.gpu_address,
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.base_level = cb_psurf->level,
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.num_samples = tex->buffer.b.b.nr_samples,
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@ -3041,7 +3043,7 @@ static void gfx11_dgpu_emit_framebuffer_state(struct si_context *sctx, unsigned
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/* Compute mutable surface parameters. */
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const struct ac_mutable_cb_state mutable_cb_state = {
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.surf = &tex->surface,
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.cb = &cb->cb,
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.cb = &sctx->framebuffer.cb[i].cb,
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.va = tex->buffer.gpu_address,
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.num_samples = tex->buffer.b.b.nr_samples,
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.dcc_enabled = vi_dcc_enabled(tex, cb_psurf->level),
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@ -3184,7 +3186,7 @@ static void gfx12_emit_framebuffer_state(struct si_context *sctx, unsigned index
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/* Compute mutable surface parameters. */
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const struct ac_mutable_cb_state mutable_cb_state = {
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.surf = &tex->surface,
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.cb = &cb->cb,
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.cb = &sctx->framebuffer.cb[i].cb,
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.va = tex->buffer.gpu_address,
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};
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struct ac_cb_surface cb_surf;
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