From 87a238d829b2ef43f226be5fc871d9be5eedf4bd Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 18 Feb 2026 16:25:06 +0100 Subject: [PATCH] radv: fix potential GPU hangs with secondaries on transfer queue Cache flushes should be skipped on SDMA. In practice, radv_emit_cache_flush() should only be called on GFX/ACE. SDMA NOP packets are emitted in barriers directly. This fixes recent VKCTS coverage dEQP-VK.api.command_buffers.secondary_on_transfer_queue. Cc: mesa-stable Signed-off-by: Samuel Pitoiset (cherry picked from commit c4d5090d698f6e75dc317ad9226aadb09b498cb9) Part-of: --- .pick_status.json | 2 +- src/amd/vulkan/radv_cmd_buffer.c | 13 ++++++++----- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index a13175b8b2e..26141c514d7 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -274,7 +274,7 @@ "description": "radv: fix potential GPU hangs with secondaries on transfer queue", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 86fe8ec69a9..b2bd3d987ed 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -9643,16 +9643,19 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou VK_FROM_HANDLE(radv_cmd_buffer, primary, commandBuffer); struct radv_device *device = radv_cmd_buffer_device(primary); const struct radv_physical_device *pdev = radv_device_physical(device); + const bool is_gfx_or_ace = primary->qf == RADV_QUEUE_GENERAL || primary->qf == RADV_QUEUE_COMPUTE; assert(commandBufferCount > 0); - radv_emit_mip_change_flush_default(primary); + if (is_gfx_or_ace) { + radv_emit_mip_change_flush_default(primary); - /* Emit pending flushes on primary prior to executing secondary */ - radv_emit_cache_flush(primary); + /* Emit pending flushes on primary prior to executing secondary */ + radv_emit_cache_flush(primary); - /* Make sure CP DMA is idle on primary prior to executing secondary. */ - radv_cp_dma_wait_for_idle(primary); + /* Make sure CP DMA is idle on primary prior to executing secondary. */ + radv_cp_dma_wait_for_idle(primary); + } for (uint32_t i = 0; i < commandBufferCount; i++) { VK_FROM_HANDLE(radv_cmd_buffer, secondary, pCmdBuffers[i]);