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radv: fix potential GPU hangs with secondaries on transfer queue
Cache flushes should be skipped on SDMA. In practice,
radv_emit_cache_flush() should only be called on GFX/ACE.
SDMA NOP packets are emitted in barriers directly.
This fixes recent VKCTS coverage
dEQP-VK.api.command_buffers.secondary_on_transfer_queue.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit c4d5090d69)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
This commit is contained in:
parent
6d7f2e3fbd
commit
87a238d829
2 changed files with 9 additions and 6 deletions
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@ -274,7 +274,7 @@
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"description": "radv: fix potential GPU hangs with secondaries on transfer queue",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": null,
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"notes": null
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@ -9643,16 +9643,19 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou
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VK_FROM_HANDLE(radv_cmd_buffer, primary, commandBuffer);
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struct radv_device *device = radv_cmd_buffer_device(primary);
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const struct radv_physical_device *pdev = radv_device_physical(device);
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const bool is_gfx_or_ace = primary->qf == RADV_QUEUE_GENERAL || primary->qf == RADV_QUEUE_COMPUTE;
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assert(commandBufferCount > 0);
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radv_emit_mip_change_flush_default(primary);
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if (is_gfx_or_ace) {
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radv_emit_mip_change_flush_default(primary);
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/* Emit pending flushes on primary prior to executing secondary */
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radv_emit_cache_flush(primary);
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/* Emit pending flushes on primary prior to executing secondary */
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radv_emit_cache_flush(primary);
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/* Make sure CP DMA is idle on primary prior to executing secondary. */
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radv_cp_dma_wait_for_idle(primary);
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/* Make sure CP DMA is idle on primary prior to executing secondary. */
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radv_cp_dma_wait_for_idle(primary);
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}
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for (uint32_t i = 0; i < commandBufferCount; i++) {
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VK_FROM_HANDLE(radv_cmd_buffer, secondary, pCmdBuffers[i]);
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