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i965: Add brw_device_info::min_ds_entries field.

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From the 3DSTATE_URB_DS documentation:

"Project: IVB, HSW
 If Domain Shader Thread Dispatch is Enabled then the minimum number of
 handles that must be allocated is 10 URB entries."

"Project: BDW+
 If Domain Shader Thread Dispatch is Enabled then the minimum number of
 handles that must be allocated is 34 URB entries."

When the HS is run in SINGLE_PATCH mode (the only mode we support
today), there is no minimum for HS - it's just zero.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Kenneth Graunke 2015-11-30 15:26:50 -08:00
parent 42ca675cc9
commit 87a1166310
2 changed files with 12 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
src/mesa/drivers/dri/i965/brw_device_info.c
View file

@ -123,6 +123,7 @@ static const struct brw_device_info brw_device_info_ivb_gt1 = {
.min_vs_entries = 32,
.max_vs_entries = 512,
.max_hs_entries = 32,
.min_ds_entries = 10,
.max_ds_entries = 288,
.max_gs_entries = 192,
},
@ -142,6 +143,7 @@ static const struct brw_device_info brw_device_info_ivb_gt2 = {
.min_vs_entries = 32,
.max_vs_entries = 704,
.max_hs_entries = 64,
.min_ds_entries = 10,
.max_ds_entries = 448,
.max_gs_entries = 320,
},
@ -162,6 +164,7 @@ static const struct brw_device_info brw_device_info_byt = {
.min_vs_entries = 32,
.max_vs_entries = 512,
.max_hs_entries = 32,
.min_ds_entries = 10,
.max_ds_entries = 288,
.max_gs_entries = 192,
},
@ -186,6 +189,7 @@ static const struct brw_device_info brw_device_info_hsw_gt1 = {
.min_vs_entries = 32,
.max_vs_entries = 640,
.max_hs_entries = 64,
.min_ds_entries = 10,
.max_ds_entries = 384,
.max_gs_entries = 256,
},
@ -204,6 +208,7 @@ static const struct brw_device_info brw_device_info_hsw_gt2 = {
.min_vs_entries = 64,
.max_vs_entries = 1664,
.max_hs_entries = 128,
.min_ds_entries = 10,
.max_ds_entries = 960,
.max_gs_entries = 640,
},
@ -222,6 +227,7 @@ static const struct brw_device_info brw_device_info_hsw_gt3 = {
.min_vs_entries = 64,
.max_vs_entries = 1664,
.max_hs_entries = 128,
.min_ds_entries = 10,
.max_ds_entries = 960,
.max_gs_entries = 640,
},
@ -249,6 +255,7 @@ static const struct brw_device_info brw_device_info_bdw_gt1 = {
.min_vs_entries = 64,
.max_vs_entries = 2560,
.max_hs_entries = 504,
.min_ds_entries = 34,
.max_ds_entries = 1536,
.max_gs_entries = 960,
}
@ -262,6 +269,7 @@ static const struct brw_device_info brw_device_info_bdw_gt2 = {
.min_vs_entries = 64,
.max_vs_entries = 2560,
.max_hs_entries = 504,
.min_ds_entries = 34,
.max_ds_entries = 1536,
.max_gs_entries = 960,
}
@ -275,6 +283,7 @@ static const struct brw_device_info brw_device_info_bdw_gt3 = {
.min_vs_entries = 64,
.max_vs_entries = 2560,
.max_hs_entries = 504,
.min_ds_entries = 34,
.max_ds_entries = 1536,
.max_gs_entries = 960,
}
@ -294,6 +303,7 @@ static const struct brw_device_info brw_device_info_chv = {
.min_vs_entries = 34,
.max_vs_entries = 640,
.max_hs_entries = 80,
.min_ds_entries = 34,
.max_ds_entries = 384,
.max_gs_entries = 256,
}
@ -318,6 +328,7 @@ static const struct brw_device_info brw_device_info_chv = {
.min_vs_entries = 64, \
.max_vs_entries = 1856, \
.max_hs_entries = 672, \
.min_ds_entries = 34, \
.max_ds_entries = 1120, \
.max_gs_entries = 640, \
}

1
src/mesa/drivers/dri/i965/brw_device_info.h
View file

@ -80,6 +80,7 @@ struct brw_device_info
unsigned min_vs_entries;
unsigned max_vs_entries;
unsigned max_hs_entries;
unsigned min_ds_entries;
unsigned max_ds_entries;
unsigned max_gs_entries;
} urb;