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i965: Fix num_uniforms count for scalar GS.

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I noticed that brw_vs.c does this.

I believe the point is that nir->num_uniforms is either counted in
scalar components (in scalar mode), or vec4 slots (in vector mode).
But we want param_count to be in scalar components regardless, so
we have to scale up in vector mode.

We don't have to scale up in scalar mode, though.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
This commit is contained in:
Kenneth Graunke 2015-11-13 13:29:16 -08:00
parent 4cff16bc3a
commit 86fc97da06
1 changed files with 3 additions and 1 deletions
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4
src/mesa/drivers/dri/i965/brw_gs.c
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@ -75,7 +75,9 @@ brw_codegen_gs_prog(struct brw_context *brw,
* every uniform is a float which gets padded to the size of a vec4.
*/
struct gl_shader *gs = prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
int param_count = gp->program.Base.nir->num_uniforms * 4;
int param_count = gp->program.Base.nir->num_uniforms;
if (!compiler->scalar_stage[MESA_SHADER_GEOMETRY])
param_count *= 4;
prog_data.base.base.param =
rzalloc_array(NULL, const gl_constant_value *, param_count);