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nvk: Set MME_DATA_FIFO_CONFIG on device init

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26615>
This commit is contained in:
Faith Ekstrand 2023-12-09 03:37:04 -06:00 • committed by Marge Bot
parent 951d96a1a2
commit 869f5fc680
1 changed files with 9 additions and 12 deletions
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21
src/nouveau/vulkan/nvk_cmd_draw.c
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@ -130,6 +130,9 @@ nvk_queue_init_context_draw_state(struct nvk_queue *queue)
free(dw);
}
if (dev->pdev->info.cls_eng3d >= TURING_A)
P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
/* Enable FP hepler invocation memory loads
*
* For generations with firmware support for our `SET_PRIV_REG` mme method
@ -2318,8 +2321,7 @@ nvk_CmdDrawIndirect(VkCommandBuffer commandBuffer,
});
if (nvk_cmd_buffer_3d_cls(cmd) >= TURING_A) {
struct nv_push *p = nvk_cmd_buffer_push(cmd, 8);
P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 6);
P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW_INDIRECT));
P_INLINE_DATA(p, begin);
uint64_t draw_addr = nvk_buffer_address(buffer, offset);
@ -2433,8 +2435,7 @@ nvk_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer,
});
if (nvk_cmd_buffer_3d_cls(cmd) >= TURING_A) {
struct nv_push *p = nvk_cmd_buffer_push(cmd, 8);
P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 6);
P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW_INDEXED_INDIRECT));
P_INLINE_DATA(p, begin);
uint64_t draw_addr = nvk_buffer_address(buffer, offset);
@ -2528,8 +2529,7 @@ nvk_CmdDrawIndirectCount(VkCommandBuffer commandBuffer,
.split_mode = SPLIT_MODE_NORMAL_BEGIN_NORMAL_END,
});
struct nv_push *p = nvk_cmd_buffer_push(cmd, 10);
P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 8);
P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW_INDIRECT_COUNT));
P_INLINE_DATA(p, begin);
uint64_t draw_addr = nvk_buffer_address(buffer, offset);
@ -2605,8 +2605,7 @@ nvk_CmdDrawIndexedIndirectCount(VkCommandBuffer commandBuffer,
.split_mode = SPLIT_MODE_NORMAL_BEGIN_NORMAL_END,
});
struct nv_push *p = nvk_cmd_buffer_push(cmd, 10);
P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 8);
P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW_INDEXED_INDIRECT_COUNT));
P_INLINE_DATA(p, begin);
uint64_t draw_addr = nvk_buffer_address(buffer, offset);
@ -2724,10 +2723,9 @@ nvk_CmdDrawIndirectByteCountEXT(VkCommandBuffer commandBuffer,
counterBufferOffset);
if (nvk_cmd_buffer_3d_cls(cmd) >= TURING_A) {
struct nv_push *p = nvk_cmd_buffer_push(cmd, 12);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 10);
P_IMMD(p, NV9097, SET_DRAW_AUTO_START, counterOffset);
P_IMMD(p, NV9097, SET_DRAW_AUTO_STRIDE, vertexStride);
P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_XFB_DRAW_INDIRECT));
P_INLINE_DATA(p, begin);
@ -2832,8 +2830,7 @@ nvk_CmdBeginTransformFeedbackEXT(VkCommandBuffer commandBuffer,
uint64_t cb_addr = nvk_buffer_address(buffer, offset);
if (nvk_cmd_buffer_device(cmd)->pdev->info.cls_eng3d >= TURING_A) {
struct nv_push *p = nvk_cmd_buffer_push(cmd, 6);
P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 4);
P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_XFB_COUNTER_LOAD));
/* The STREAM_OUT_BUFFER_LOAD_WRITE_POINTER registers are 8 dword stride */
P_INLINE_DATA(p, cb_idx * 8);