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aco: support VS prologs with unaligned access
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29071>
This commit is contained in:
Rhys Perry
Marge Bot
parent
9ec2fa392f
commit
869253b66c
1 changed files with 198 additions and 10 deletions
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@ -12359,6 +12359,193 @@ get_next_vgpr(unsigned size, unsigned* num, int *offset = NULL)
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return PhysReg(256 + reg);
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}
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struct UnalignedVsAttribLoad {
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/* dst/scratch are PhysReg converted to unsigned */
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unsigned dst;
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unsigned scratch;
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bool d16;
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const struct ac_vtx_format_info* vtx_info;
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};
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struct UnalignedVsAttribLoadState {
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unsigned max_vgprs;
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unsigned initial_num_vgprs;
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unsigned* num_vgprs;
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unsigned overflow_num_vgprs;
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aco::small_vec<UnalignedVsAttribLoad, 16> current_loads;
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};
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void
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convert_unaligned_vs_attrib(Builder& bld, UnalignedVsAttribLoad load)
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{
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PhysReg dst(load.dst);
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PhysReg scratch(load.scratch);
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const struct ac_vtx_format_info* vtx_info = load.vtx_info;
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unsigned dfmt = vtx_info->hw_format[0] & 0xf;
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unsigned nfmt = vtx_info->hw_format[0] >> 4;
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unsigned size = vtx_info->chan_byte_size ? vtx_info->chan_byte_size : vtx_info->element_size;
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if (load.d16) {
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bld.vop3(aco_opcode::v_lshl_or_b32, Definition(dst, v1), Operand(scratch, v1),
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Operand::c32(8), Operand(dst, v1));
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} else {
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for (unsigned i = 1; i < size; i++) {
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PhysReg byte_reg = scratch.advance(i * 4 - 4);
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if (bld.program->gfx_level >= GFX9) {
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bld.vop3(aco_opcode::v_lshl_or_b32, Definition(dst, v1), Operand(byte_reg, v1),
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Operand::c32(i * 8), Operand(dst, v1));
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} else {
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bld.vop2(aco_opcode::v_lshlrev_b32, Definition(byte_reg, v1), Operand::c32(i * 8),
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Operand(byte_reg, v1));
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bld.vop2(aco_opcode::v_or_b32, Definition(dst, v1), Operand(dst, v1),
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Operand(byte_reg, v1));
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}
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}
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}
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unsigned num_channels = vtx_info->chan_byte_size ? 1 : vtx_info->num_channels;
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PhysReg chan[4] = {dst, dst.advance(4), dst.advance(8), dst.advance(12)};
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if (dfmt == V_008F0C_BUF_DATA_FORMAT_10_11_11) {
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bld.vop3(aco_opcode::v_bfe_u32, Definition(chan[2], v1), Operand(dst, v1), Operand::c32(22),
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Operand::c32(10));
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bld.vop3(aco_opcode::v_bfe_u32, Definition(chan[1], v1), Operand(dst, v1), Operand::c32(11),
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Operand::c32(11));
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bld.vop3(aco_opcode::v_bfe_u32, Definition(chan[0], v1), Operand(dst, v1), Operand::c32(0),
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Operand::c32(11));
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bld.vop2(aco_opcode::v_lshlrev_b32, Definition(chan[2], v1), Operand::c32(5),
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Operand(chan[2], v1));
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bld.vop2(aco_opcode::v_lshlrev_b32, Definition(chan[1], v1), Operand::c32(4),
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Operand(chan[1], v1));
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bld.vop2(aco_opcode::v_lshlrev_b32, Definition(chan[0], v1), Operand::c32(4),
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Operand(chan[0], v1));
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} else if (dfmt == V_008F0C_BUF_DATA_FORMAT_2_10_10_10) {
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aco_opcode bfe = aco_opcode::v_bfe_u32;
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switch (nfmt) {
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case V_008F0C_BUF_NUM_FORMAT_SNORM:
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case V_008F0C_BUF_NUM_FORMAT_SSCALED:
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case V_008F0C_BUF_NUM_FORMAT_SINT: bfe = aco_opcode::v_bfe_i32; break;
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default: break;
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}
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bool swapxz = G_008F0C_DST_SEL_X(vtx_info->dst_sel) != V_008F0C_SQ_SEL_X;
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bld.vop3(bfe, Definition(chan[3], v1), Operand(dst, v1), Operand::c32(30), Operand::c32(2));
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bld.vop3(bfe, Definition(chan[2], v1), Operand(dst, v1), Operand::c32(swapxz ? 0 : 20),
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Operand::c32(10));
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bld.vop3(bfe, Definition(chan[1], v1), Operand(dst, v1), Operand::c32(10), Operand::c32(10));
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bld.vop3(bfe, Definition(chan[0], v1), Operand(dst, v1), Operand::c32(swapxz ? 20 : 0),
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Operand::c32(10));
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} else if (dfmt == V_008F0C_BUF_DATA_FORMAT_8 || dfmt == V_008F0C_BUF_DATA_FORMAT_16) {
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unsigned bits = dfmt == V_008F0C_BUF_DATA_FORMAT_8 ? 8 : 16;
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switch (nfmt) {
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case V_008F0C_BUF_NUM_FORMAT_SNORM:
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case V_008F0C_BUF_NUM_FORMAT_SSCALED:
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case V_008F0C_BUF_NUM_FORMAT_SINT:
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bld.vop3(aco_opcode::v_bfe_i32, Definition(dst, v1), Operand(dst, v1), Operand::c32(0),
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Operand::c32(bits));
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break;
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default: break;
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}
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}
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if (nfmt == V_008F0C_BUF_NUM_FORMAT_FLOAT &&
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(dfmt == V_008F0C_BUF_DATA_FORMAT_16 || dfmt == V_008F0C_BUF_DATA_FORMAT_10_11_11)) {
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for (unsigned i = 0; i < num_channels; i++)
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bld.vop1(aco_opcode::v_cvt_f32_f16, Definition(chan[i], v1), Operand(chan[i], v1));
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} else if (nfmt == V_008F0C_BUF_NUM_FORMAT_USCALED || nfmt == V_008F0C_BUF_NUM_FORMAT_UNORM) {
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for (unsigned i = 0; i < num_channels; i++)
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bld.vop1(aco_opcode::v_cvt_f32_u32, Definition(chan[i], v1), Operand(chan[i], v1));
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} else if (nfmt == V_008F0C_BUF_NUM_FORMAT_SSCALED || nfmt == V_008F0C_BUF_NUM_FORMAT_SNORM) {
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for (unsigned i = 0; i < num_channels; i++)
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bld.vop1(aco_opcode::v_cvt_f32_i32, Definition(chan[i], v1), Operand(chan[i], v1));
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}
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std::array<unsigned, 4> chan_max;
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switch (dfmt) {
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case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: chan_max = {1023, 1023, 1023, 3}; break;
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case V_008F0C_BUF_DATA_FORMAT_8: chan_max = {255, 255, 255, 255}; break;
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case V_008F0C_BUF_DATA_FORMAT_16: chan_max = {65535, 65535, 65535, 65535}; break;
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}
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if (nfmt == V_008F0C_BUF_NUM_FORMAT_UNORM) {
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for (unsigned i = 0; i < num_channels; i++)
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bld.vop2(aco_opcode::v_mul_f32, Definition(chan[i], v1),
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Operand::c32(fui(1.0 / chan_max[i])), Operand(chan[i], v1));
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} else if (nfmt == V_008F0C_BUF_NUM_FORMAT_SNORM) {
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for (unsigned i = 0; i < num_channels; i++) {
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bld.vop2(aco_opcode::v_mul_f32, Definition(chan[i], v1),
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Operand::c32(fui(1.0 / (chan_max[i] >> 1))), Operand(chan[i], v1));
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bld.vop2(aco_opcode::v_max_f32, Definition(chan[i], v1), Operand::c32(0xbf800000),
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Operand(chan[i], v1));
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}
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}
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}
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void
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convert_current_unaligned_vs_attribs(Builder& bld, UnalignedVsAttribLoadState* state)
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{
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if (state->current_loads.empty())
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return;
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wait_imm vm_imm;
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vm_imm.vm = 0;
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bld.sopp(aco_opcode::s_waitcnt, vm_imm.pack(bld.program->gfx_level));
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for (UnalignedVsAttribLoad load : state->current_loads)
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convert_unaligned_vs_attrib(bld, load);
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state->current_loads.clear();
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state->overflow_num_vgprs = state->initial_num_vgprs;
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state->num_vgprs = &state->overflow_num_vgprs;
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}
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void
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load_unaligned_vs_attrib(Builder& bld, PhysReg dst, Operand desc, Operand index, uint32_t offset,
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const struct ac_vtx_format_info* vtx_info,
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UnalignedVsAttribLoadState* state)
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{
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unsigned size = vtx_info->chan_byte_size ? vtx_info->chan_byte_size : vtx_info->element_size;
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UnalignedVsAttribLoad load;
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load.dst = dst;
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load.vtx_info = vtx_info;
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load.d16 = bld.program->gfx_level >= GFX9 && !bld.program->dev.sram_ecc_enabled && size == 4;
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unsigned num_scratch_vgprs = load.d16 ? 1 : (size - 1);
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if (!vtx_info->chan_byte_size) {
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/* When chan_byte_size==0, we're loading the entire attribute, so we can use the last 3
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* components of the destination.
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*/
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assert(num_scratch_vgprs <= 3);
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load.scratch = dst.advance(4);
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} else {
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if (*state->num_vgprs + num_scratch_vgprs > state->max_vgprs)
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convert_current_unaligned_vs_attribs(bld, state);
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load.scratch = get_next_vgpr(num_scratch_vgprs, state->num_vgprs, NULL);
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}
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PhysReg scratch(load.scratch);
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if (load.d16) {
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bld.mubuf(aco_opcode::buffer_load_ubyte_d16, Definition(dst, v1), desc, index,
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Operand::c32(0u), offset, false, false, true);
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bld.mubuf(aco_opcode::buffer_load_ubyte_d16_hi, Definition(dst, v1), desc, index,
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Operand::c32(0u), offset + 2, false, false, true);
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bld.mubuf(aco_opcode::buffer_load_ubyte_d16, Definition(scratch, v1), desc, index,
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Operand::c32(0u), offset + 1, false, false, true);
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bld.mubuf(aco_opcode::buffer_load_ubyte_d16_hi, Definition(scratch, v1), desc, index,
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Operand::c32(0u), offset + 3, false, false, true);
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} else {
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for (unsigned i = 0; i < size; i++) {
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Definition def(i ? scratch.advance(i * 4 - 4) : dst, v1);
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bld.mubuf(aco_opcode::buffer_load_ubyte, def, desc, index, Operand::c32(0u), offset + i,
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false, false, true);
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}
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}
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state->current_loads.push_back(load);
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}
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void
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select_vs_prolog(Program* program, const struct aco_vs_prolog_info* pinfo, ac_shader_config* config,
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const struct aco_compiler_options* options, const struct aco_shader_info* info,
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@ -12438,6 +12625,11 @@ select_vs_prolog(Program* program, const struct aco_vs_prolog_info* pinfo, ac_sh
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const struct ac_vtx_format_info* vtx_info_table =
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ac_get_vtx_format_info_table(GFX8, CHIP_POLARIS10);
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UnalignedVsAttribLoadState unaligned_state;
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unaligned_state.max_vgprs = MAX2(84, num_vgprs + 8);
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unaligned_state.initial_num_vgprs = num_vgprs;
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unaligned_state.num_vgprs = &num_vgprs;
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unsigned num_sgprs = 0;
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for (unsigned loc = 0; loc < pinfo->num_attributes;) {
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unsigned num_descs =
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@ -12520,19 +12712,13 @@ select_vs_prolog(Program* program, const struct aco_vs_prolog_info* pinfo, ac_sh
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unsigned dfmt = vtx_info->hw_format[0] & 0xf;
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unsigned nfmt = vtx_info->hw_format[0] >> 4;
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for (unsigned j = 0; j < vtx_info->num_channels; j++) {
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for (unsigned j = 0; j < (vtx_info->chan_byte_size ? vtx_info->num_channels : 1); j++) {
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bool post_shuffle = pinfo->post_shuffle & (1u << loc);
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unsigned offset = vtx_info->chan_byte_size * (post_shuffle && j < 3 ? 2 - j : j);
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/* Use MUBUF to workaround hangs for byte-aligned dword loads. The Vulkan spec
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* doesn't require this to work, but some GL CTS tests over Zink do this anyway.
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* MTBUF can hang, but MUBUF doesn't (probably gives garbage, but GL CTS doesn't
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* care).
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*/
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if (dfmt == V_008F0C_BUF_DATA_FORMAT_32)
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bld.mubuf(aco_opcode::buffer_load_dword, Definition(dest.advance(j * 4u), v1),
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Operand(cur_desc, s4), fetch_index, Operand::c32(0u), offset, false,
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false, true);
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if ((pinfo->unaligned_mask & (1u << loc)) && vtx_info->chan_byte_size <= 4)
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load_unaligned_vs_attrib(bld, dest.advance(j * 4u), Operand(cur_desc, s4),
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fetch_index, offset, vtx_info, &unaligned_state);
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else if (vtx_info->chan_byte_size == 8)
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bld.mtbuf(aco_opcode::tbuffer_load_format_xy,
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Definition(dest.advance(j * 8u), v2), Operand(cur_desc, s4),
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@ -12583,6 +12769,8 @@ select_vs_prolog(Program* program, const struct aco_vs_prolog_info* pinfo, ac_sh
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}
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}
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convert_current_unaligned_vs_attribs(bld, &unaligned_state);
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if (pinfo->alpha_adjust_lo | pinfo->alpha_adjust_hi) {
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wait_imm vm_imm;
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vm_imm.vm = 0;
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