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radv: adding video decode queue support

Browse source 
This adds the video queue interactions to radv and builds
on the winsys code previously added.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>
This commit is contained in:
Dave Airlie 2022-03-14 10:46:42 +10:00
parent 30b6e9797d
commit 85eead4198
3 changed files with 22 additions and 3 deletions
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10
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -264,6 +264,10 @@ radv_queue_family_to_ring(struct radv_physical_device *physical_device,
return AMD_IP_COMPUTE;
case RADV_QUEUE_TRANSFER:
return AMD_IP_SDMA;
case RADV_QUEUE_VIDEO_DEC:
return radv_has_uvd(physical_device) ? AMD_IP_UVD : AMD_IP_VCN_DEC;
case RADV_QUEUE_VIDEO_ENC:
return AMD_IP_VCN_ENC;
default:
unreachable("Unknown queue family");
}
@ -6039,7 +6043,8 @@ radv_EndCommandBuffer(VkCommandBuffer commandBuffer)
radv_emit_mip_change_flush_default(cmd_buffer);
if (cmd_buffer->qf != RADV_QUEUE_TRANSFER) {
if (cmd_buffer->qf == RADV_QUEUE_GENERAL ||
cmd_buffer->qf == RADV_QUEUE_COMPUTE) {
if (cmd_buffer->device->physical_device->rad_info.gfx_level == GFX6)
cmd_buffer->state.flush_bits |=
RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_PS_PARTIAL_FLUSH | RADV_CMD_FLAG_WB_L2;
@ -6079,7 +6084,8 @@ radv_EndCommandBuffer(VkCommandBuffer commandBuffer)
/* Make sure CP DMA is idle at the end of IBs because the kernel
* doesn't wait for it.
*/
si_cp_dma_wait_for_idle(cmd_buffer);
if (cmd_buffer->qf != RADV_QUEUE_VIDEO_DEC)
si_cp_dma_wait_for_idle(cmd_buffer);
radv_describe_end_cmd_buffer(cmd_buffer);

3
src/amd/vulkan/radv_device.c
View file

@ -5502,7 +5502,8 @@ radv_update_preambles(struct radv_queue_state *queue, struct radv_device *device
struct vk_command_buffer *const *cmd_buffers, uint32_t cmd_buffer_count,
bool *use_perf_counters, bool *use_ace)
{
if (queue->qf == RADV_QUEUE_TRANSFER)
if (queue->qf != RADV_QUEUE_GENERAL &&
queue->qf != RADV_QUEUE_COMPUTE)
return VK_SUCCESS;
/* Figure out the needs of the current submission.

12
src/amd/vulkan/radv_private.h
View file

@ -250,6 +250,8 @@ enum radv_queue_family {
RADV_QUEUE_GENERAL,
RADV_QUEUE_COMPUTE,
RADV_QUEUE_TRANSFER,
RADV_QUEUE_VIDEO_DEC,
RADV_QUEUE_VIDEO_ENC,
RADV_MAX_QUEUE_FAMILIES,
RADV_QUEUE_FOREIGN = RADV_MAX_QUEUE_FAMILIES,
RADV_QUEUE_IGNORED,
@ -736,6 +738,16 @@ vk_queue_to_radv(const struct radv_physical_device *phys_dev, int queue_family_i
enum amd_ip_type radv_queue_family_to_ring(struct radv_physical_device *physical_device,
enum radv_queue_family f);
static inline bool
radv_has_uvd(struct radv_physical_device *phys_dev)
{
enum radeon_family family = phys_dev->rad_info.family;
/* Only support UVD on TONGA+ */
if (family < CHIP_TONGA)
return false;
return phys_dev->rad_info.ip[AMD_IP_UVD].num_queues > 0;
}
struct radv_queue_ring_info {
uint32_t scratch_size_per_wave;
uint32_t scratch_waves;