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aco: add p_end_with_regs pseudo instruction

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Used by radeonsi shader parts to pass args from one part to another.
It has variable number of operands to reserve fixed registers with
wanted value.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>
This commit is contained in:
Qiang Yu 2023-07-07 15:50:13 +08:00 • committed by Marge Bot
parent a3549d7f7a
commit 85d9646288
4 changed files with 9 additions and 2 deletions
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3
src/amd/compiler/aco_insert_exec_mask.cpp
View file

@ -103,7 +103,8 @@ needs_exact(aco_ptr<Instruction>& instr)
* epilog without considering the exec mask.
*/
return instr->isEXP() || instr->opcode == aco_opcode::p_jump_to_epilog ||
instr->opcode == aco_opcode::p_dual_src_export_gfx11;
instr->opcode == aco_opcode::p_dual_src_export_gfx11 ||
instr->opcode == aco_opcode::p_end_with_regs;
}
}

4
src/amd/compiler/aco_opcodes.py
View file

@ -375,6 +375,10 @@ opcode("p_interp_gfx11")
# performs dual source MRTs swizzling and emits exports on GFX11
opcode("p_dual_src_export_gfx11")
# Let shader end with specific registers set to wanted value, used by multi part
# shader to pass arguments to next part.
opcode("p_end_with_regs")
# SOP2 instructions: 2 scalar inputs, 1 scalar output (+optional scc)
SOP2 = {
# GFX6, GFX7, GFX8, GFX9, GFX10,GFX11,name

3
src/amd/compiler/aco_scheduler.cpp
View file

@ -611,7 +611,8 @@ perform_hazard_query(hazard_query* query, Instruction* instr, bool upwards)
instr->opcode == aco_opcode::p_init_scratch ||
instr->opcode == aco_opcode::p_jump_to_epilog ||
instr->opcode == aco_opcode::s_sendmsg_rtn_b32 ||
instr->opcode == aco_opcode::s_sendmsg_rtn_b64)
instr->opcode == aco_opcode::s_sendmsg_rtn_b64 ||
instr->opcode == aco_opcode::p_end_with_regs)
return hazard_fail_unreorderable;
memory_event_set instr_set;

1
src/amd/compiler/aco_validate.cpp
View file

@ -266,6 +266,7 @@ validate_ir(Program* program)
instr->opcode == aco_opcode::p_create_vector ||
instr->opcode == aco_opcode::p_jump_to_epilog ||
instr->opcode == aco_opcode::p_dual_src_export_gfx11 ||
instr->opcode == aco_opcode::p_end_with_regs ||
(instr->opcode == aco_opcode::p_interp_gfx11 && i == 0) ||
(instr->opcode == aco_opcode::p_bpermute_gfx11w64 && i == 0) ||
(flat && i == 1) || (instr->isMIMG() && (i == 1 || i == 2)) ||