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intel/genxml: Support truncated addresses

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Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
This commit is contained in:
Jason Ekstrand 2020-06-12 16:31:34 -05:00 • committed by Marge Bot
parent ba9c714cac
commit 858d565eea
1 changed files with 22 additions and 3 deletions
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25
src/intel/genxml/gen_pack_header.py
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@ -125,6 +125,22 @@ __gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t en
return v;
}
static inline __attribute__((always_inline)) uint64_t
__gen_address(__gen_user_data *data, void *location,
__gen_address_type address, uint32_t delta,
NDEBUG_UNUSED uint32_t start, uint32_t end)
{
uint64_t addr_u64 = __gen_combine_address(data, location, address, delta);
if (end == 31) {
return addr_u64;
} else if (end < 63) {
const unsigned shift = 63 - end;
return (addr_u64 << shift) >> shift;
} else {
return addr_u64;
}
}
static inline __attribute__((always_inline)) uint32_t
__gen_float(float v)
{
@ -462,13 +478,16 @@ class Group(object):
if dw.size == 32:
if dw.address:
print(" dw[%d] = __gen_combine_address(data, &dw[%d], values->%s, %s);" % (index, index, dw.address.name + field.dim, v))
print(" dw[%d] = __gen_address(data, &dw[%d], values->%s, %s, %d, %d);" %
(index, index, dw.address.name + field.dim, v,
dw.address.start - dword_start, dw.address.end - dword_start))
continue
if dw.address:
v_address = "v%d_address" % index
print(" const uint64_t %s =\n __gen_combine_address(data, &dw[%d], values->%s, %s);" %
(v_address, index, dw.address.name + field.dim, v))
print(" const uint64_t %s =\n __gen_address(data, &dw[%d], values->%s, %s, %d, %d);" %
(v_address, index, dw.address.name + field.dim, v,
dw.address.start - dword_start, dw.address.end - dword_start))
if len(dw.fields) > address_count:
print(" dw[%d] = %s;" % (index, v_address))
print(" dw[%d] = (%s >> 32) | (%s >> 32);" % (index + 1, v_address, v))