From 84963d6833fe05741da9f806d39f921b1f4f3179 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Thu, 13 Feb 2025 21:56:22 -0800 Subject: [PATCH] intel/brw: Take shader in the brw_generator::generate_code() parameters Simplify the calls in all the stage compile functions. Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_compile_bs.cpp | 3 +-- src/intel/compiler/brw_compile_cs.cpp | 4 +--- src/intel/compiler/brw_compile_fs.cpp | 15 ++++----------- src/intel/compiler/brw_compile_gs.cpp | 3 +-- src/intel/compiler/brw_compile_mesh.cpp | 14 ++++++-------- src/intel/compiler/brw_compile_tcs.cpp | 4 +--- src/intel/compiler/brw_compile_tes.cpp | 4 +--- src/intel/compiler/brw_compile_vs.cpp | 3 +-- src/intel/compiler/brw_generator.cpp | 17 +++++++++-------- src/intel/compiler/brw_generator.h | 7 ++----- 10 files changed, 27 insertions(+), 47 deletions(-) diff --git a/src/intel/compiler/brw_compile_bs.cpp b/src/intel/compiler/brw_compile_bs.cpp index da3f5ee13e0..707dcb36c6b 100644 --- a/src/intel/compiler/brw_compile_bs.cpp +++ b/src/intel/compiler/brw_compile_bs.cpp @@ -109,8 +109,7 @@ compile_single_bs(const struct brw_compiler *compiler, return 0; } - int offset = g->generate_code(s.cfg, s.dispatch_width, s.shader_stats, - s.performance_analysis.require(), stats); + int offset = g->generate_code(s, stats); if (prog_offset) *prog_offset = offset; else diff --git a/src/intel/compiler/brw_compile_cs.cpp b/src/intel/compiler/brw_compile_cs.cpp index 34c59a2da4d..4483bc537e3 100644 --- a/src/intel/compiler/brw_compile_cs.cpp +++ b/src/intel/compiler/brw_compile_cs.cpp @@ -285,9 +285,7 @@ brw_compile_cs(const struct brw_compiler *compiler, for (unsigned simd = 0; simd < 3; simd++) { if (prog_data->prog_mask & (1u << simd)) { assert(v[simd]); - prog_data->prog_offset[simd] = - g.generate_code(v[simd]->cfg, 8u << simd, v[simd]->shader_stats, - v[simd]->performance_analysis.require(), stats); + prog_data->prog_offset[simd] = g.generate_code(*v[simd], stats); if (stats) stats->max_dispatch_width = max_dispatch_width; stats = stats ? stats + 1 : NULL; diff --git a/src/intel/compiler/brw_compile_fs.cpp b/src/intel/compiler/brw_compile_fs.cpp index 80b4f850cd8..9535156fba5 100644 --- a/src/intel/compiler/brw_compile_fs.cpp +++ b/src/intel/compiler/brw_compile_fs.cpp @@ -1911,33 +1911,26 @@ brw_compile_fs(const struct brw_compiler *compiler, if (vmulti) { prog_data->dispatch_multi = vmulti->dispatch_width; prog_data->max_polygons = vmulti->max_polygons; - g.generate_code(vmulti->cfg, vmulti->dispatch_width, vmulti->shader_stats, - vmulti->performance_analysis.require(), - stats, vmulti->max_polygons); + g.generate_code(*vmulti, stats); stats = stats ? stats + 1 : NULL; max_dispatch_width = vmulti->dispatch_width; } else if (v8) { prog_data->dispatch_8 = true; - g.generate_code(v8->cfg, 8, v8->shader_stats, - v8->performance_analysis.require(), stats, 1); + g.generate_code(*v8, stats); stats = stats ? stats + 1 : NULL; max_dispatch_width = 8; } if (v16) { prog_data->dispatch_16 = true; - prog_data->prog_offset_16 = g.generate_code( - v16->cfg, 16, v16->shader_stats, - v16->performance_analysis.require(), stats, 1); + prog_data->prog_offset_16 = g.generate_code(*v16, stats); stats = stats ? stats + 1 : NULL; max_dispatch_width = 16; } if (v32) { prog_data->dispatch_32 = true; - prog_data->prog_offset_32 = g.generate_code( - v32->cfg, 32, v32->shader_stats, - v32->performance_analysis.require(), stats, 1); + prog_data->prog_offset_32 = g.generate_code(*v32, stats); stats = stats ? stats + 1 : NULL; max_dispatch_width = 32; } diff --git a/src/intel/compiler/brw_compile_gs.cpp b/src/intel/compiler/brw_compile_gs.cpp index 6c6d9dbba40..111ba9e48e1 100644 --- a/src/intel/compiler/brw_compile_gs.cpp +++ b/src/intel/compiler/brw_compile_gs.cpp @@ -384,8 +384,7 @@ brw_compile_gs(const struct brw_compiler *compiler, label, nir->info.name); g.enable_debug(name); } - g.generate_code(v.cfg, v.dispatch_width, v.shader_stats, - v.performance_analysis.require(), params->base.stats); + g.generate_code(v, params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); } diff --git a/src/intel/compiler/brw_compile_mesh.cpp b/src/intel/compiler/brw_compile_mesh.cpp index 344ec8e9eba..079ea993ce1 100644 --- a/src/intel/compiler/brw_compile_mesh.cpp +++ b/src/intel/compiler/brw_compile_mesh.cpp @@ -442,10 +442,10 @@ brw_compile_task(const struct brw_compiler *compiler, return NULL; } - brw_shader *selected = v[selected_simd].get(); + brw_shader &selected = *v[selected_simd]; prog_data->base.prog_mask = 1 << selected_simd; prog_data->base.base.grf_used = MAX2(prog_data->base.base.grf_used, - selected->grf_used); + selected.grf_used); if (unlikely(debug_enabled)) { fprintf(stderr, "Task Output "); @@ -462,8 +462,7 @@ brw_compile_task(const struct brw_compiler *compiler, nir->info.name)); } - g.generate_code(selected->cfg, selected->dispatch_width, selected->shader_stats, - selected->performance_analysis.require(), params->base.stats); + g.generate_code(selected, params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); } @@ -1297,10 +1296,10 @@ brw_compile_mesh(const struct brw_compiler *compiler, return NULL; } - brw_shader *selected = v[selected_simd].get(); + brw_shader &selected = *v[selected_simd]; prog_data->base.prog_mask = 1 << selected_simd; prog_data->base.base.grf_used = MAX2(prog_data->base.base.grf_used, - selected->grf_used); + selected.grf_used); if (unlikely(debug_enabled)) { if (params->tue_map) { @@ -1321,8 +1320,7 @@ brw_compile_mesh(const struct brw_compiler *compiler, nir->info.name)); } - g.generate_code(selected->cfg, selected->dispatch_width, selected->shader_stats, - selected->performance_analysis.require(), params->base.stats); + g.generate_code(selected, params->base.stats); if (prog_data->map.wa_18019110168_active) { int8_t remap_table[VARYING_SLOT_TESS_MAX]; memset(remap_table, -1, sizeof(remap_table)); diff --git a/src/intel/compiler/brw_compile_tcs.cpp b/src/intel/compiler/brw_compile_tcs.cpp index 2cd499b47a1..c9904765f6a 100644 --- a/src/intel/compiler/brw_compile_tcs.cpp +++ b/src/intel/compiler/brw_compile_tcs.cpp @@ -304,9 +304,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, nir->info.name)); } - g.generate_code(v.cfg, dispatch_width, v.shader_stats, - v.performance_analysis.require(), params->base.stats); - + g.generate_code(v, params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); diff --git a/src/intel/compiler/brw_compile_tes.cpp b/src/intel/compiler/brw_compile_tes.cpp index e0e18ccc786..642159f5fca 100644 --- a/src/intel/compiler/brw_compile_tes.cpp +++ b/src/intel/compiler/brw_compile_tes.cpp @@ -190,9 +190,7 @@ brw_compile_tes(const struct brw_compiler *compiler, nir->info.name)); } - g.generate_code(v.cfg, dispatch_width, v.shader_stats, - v.performance_analysis.require(), params->base.stats); - + g.generate_code(v, params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); diff --git a/src/intel/compiler/brw_compile_vs.cpp b/src/intel/compiler/brw_compile_vs.cpp index 89ca70de6af..2c9514bcf1d 100644 --- a/src/intel/compiler/brw_compile_vs.cpp +++ b/src/intel/compiler/brw_compile_vs.cpp @@ -374,8 +374,7 @@ brw_compile_vs(const struct brw_compiler *compiler, g.enable_debug(debug_name); } - g.generate_code(v.cfg, dispatch_width, v.shader_stats, - v.performance_analysis.require(), params->base.stats); + g.generate_code(v, params->base.stats); g.add_const_data(nir->constant_data, nir->constant_data_size); return g.get_assembly(); diff --git a/src/intel/compiler/brw_generator.cpp b/src/intel/compiler/brw_generator.cpp index cce66a6c1e1..f8b805e527c 100644 --- a/src/intel/compiler/brw_generator.cpp +++ b/src/intel/compiler/brw_generator.cpp @@ -732,12 +732,13 @@ brw_generator::enable_debug(const char *shader_name) } int -brw_generator::generate_code(const cfg_t *cfg, int dispatch_width, - struct brw_shader_stats shader_stats, - const brw_performance &perf, - struct brw_compile_stats *stats, - unsigned max_polygons) +brw_generator::generate_code(const brw_shader &s, + struct brw_compile_stats *stats) { + const int dispatch_width = s.dispatch_width; + struct brw_shader_stats shader_stats = s.shader_stats; + const brw_performance &perf = s.performance_analysis.require(); + /* align to 64 byte boundary. */ brw_realign(p, 64); @@ -748,10 +749,10 @@ brw_generator::generate_code(const cfg_t *cfg, int dispatch_width, int loop_count = 0, send_count = 0, nop_count = 0, sync_nop_count = 0; bool is_accum_used = false; - struct disasm_info *disasm_info = disasm_initialize(p->isa, cfg); + struct disasm_info *disasm_info = disasm_initialize(p->isa, s.cfg); brw_inst *prev_inst = NULL; - foreach_block_and_inst (block, brw_inst, inst, cfg) { + foreach_block_and_inst (block, brw_inst, inst, s.cfg) { if (inst->opcode == SHADER_OPCODE_UNDEF) continue; @@ -1488,7 +1489,7 @@ brw_generator::generate_code(const cfg_t *cfg, int dispatch_width, before_size, after_size); if (stats) { stats->dispatch_width = dispatch_width; - stats->max_polygons = max_polygons; + stats->max_polygons = s.max_polygons; stats->max_dispatch_width = dispatch_width; stats->instructions = before_size / 16 - nop_count - sync_nop_count; stats->sends = send_count; diff --git a/src/intel/compiler/brw_generator.h b/src/intel/compiler/brw_generator.h index c95eddb3828..13cf4bb304c 100644 --- a/src/intel/compiler/brw_generator.h +++ b/src/intel/compiler/brw_generator.h @@ -18,11 +18,8 @@ public: ~brw_generator(); void enable_debug(const char *shader_name); - int generate_code(const cfg_t *cfg, int dispatch_width, - struct brw_shader_stats shader_stats, - const brw_performance &perf, - struct brw_compile_stats *stats, - unsigned max_polygons = 0); + int generate_code(const brw_shader &s, + struct brw_compile_stats *stats); void add_const_data(void *data, unsigned size); void add_resume_sbt(unsigned num_resume_shaders, uint64_t *sbt); const unsigned *get_assembly();