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iris: Defines for base addresses rather than numbers everywhere
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c75a1254a4
commit
841b3b9003
4 changed files with 56 additions and 15 deletions
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@ -30,8 +30,6 @@
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struct iris_bo;
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struct iris_bufmgr;
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#define IRIS_BINDER_ADDRESS (1ull << 32)
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struct iris_binder
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{
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struct iris_bo *bo;
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@ -229,19 +229,22 @@ bucket_for_size(struct iris_bufmgr *bufmgr, uint64_t size)
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static enum iris_memory_zone
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memzone_for_address(uint64_t address)
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{
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const uint64_t _4GB = 1ull << 32;
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STATIC_ASSERT(IRIS_MEMZONE_OTHER_START > IRIS_MEMZONE_DYNAMIC_START);
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STATIC_ASSERT(IRIS_MEMZONE_DYNAMIC_START > IRIS_MEMZONE_SURFACE_START);
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STATIC_ASSERT(IRIS_MEMZONE_SURFACE_START > IRIS_MEMZONE_SHADER_START);
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STATIC_ASSERT(IRIS_BINDER_ADDRESS == IRIS_MEMZONE_SURFACE_START);
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if (address >= 3 * _4GB)
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if (address >= IRIS_MEMZONE_OTHER_START)
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return IRIS_MEMZONE_OTHER;
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if (address >= 2 * _4GB)
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if (address >= IRIS_MEMZONE_DYNAMIC_START)
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return IRIS_MEMZONE_DYNAMIC;
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if (address > 1 * _4GB)
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/* Use > to exclude the binder */
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if (address > IRIS_MEMZONE_SURFACE_START)
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return IRIS_MEMZONE_SURFACE;
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/* The binder isn't in any memory zone. */
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if (address == 1 * _4GB)
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if (address == IRIS_BINDER_ADDRESS)
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return IRIS_MEMZONE_BINDER;
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return IRIS_MEMZONE_SHADER;
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@ -1537,16 +1540,18 @@ iris_bufmgr_init(struct gen_device_info *devinfo, int fd)
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bufmgr->has_llc = devinfo->has_llc;
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STATIC_ASSERT(IRIS_MEMZONE_SHADER_START == 0ull);
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const uint64_t _4GB = 1ull << 32;
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SHADER],
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PAGE_SIZE, _4GB);
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SURFACE],
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1 * _4GB, _4GB);
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IRIS_MEMZONE_SURFACE_START, _4GB);
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_DYNAMIC],
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2 * _4GB, _4GB);
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IRIS_MEMZONE_DYNAMIC_START, _4GB);
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util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_OTHER],
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3 * _4GB, (1ull << 48) - 3 * _4GB);
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IRIS_MEMZONE_OTHER_START,
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(1ull << 48) - IRIS_MEMZONE_OTHER_START);
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// XXX: driconf
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bufmgr->bo_reuse = env_var_as_boolean("bo_reuse", true);
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@ -36,10 +36,40 @@
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struct gen_device_info;
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struct pipe_debug_callback;
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/**
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* Memory zones. When allocating a buffer, you can request that it is
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* placed into a specific region of the virtual address space (PPGTT).
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*
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* Most buffers can go anywhere (IRIS_MEMZONE_OTHER). Some buffers are
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* accessed via an offset from a base address. STATE_BASE_ADDRESS has
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* a maximum 4GB size for each region, so we need to restrict those
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* buffers to be within 4GB of the base. Each memory zone corresponds
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* to a particular base address.
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*
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* We lay out the virtual address space as follows:
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*
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* - [0, 4K): Nothing (empty page for null address)
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* - [4K, 4G): Shaders (Instruction Base Address)
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* - [4G, 8G): Surfaces (Surface State Base Address, Bindless ...)
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* - [8G, 12G): Dynamic (Dynamic State Base Address)
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* - [12G, *): Other (everything else in the full 48-bit VMA)
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*
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* A special 64kB "binder" buffer lives at the start of the surface memory
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* zone, holding binding tables referring to objects in the rest of the zone.
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*
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* Each GL context uses a separate GEM context, which technically gives them
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* each a separate VMA. However, we assign address globally, so buffers will
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* have the same address in all GEM contexts. This lets us have a single BO
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* field for the address, which is easy and cheap.
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*
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* One exception is the special "binder" BO. Binders are context-local,
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* so while there are many of them, all binders are stored at the same
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* fixed address (in different VMAs).
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*/
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enum iris_memory_zone {
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IRIS_MEMZONE_DYNAMIC,
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IRIS_MEMZONE_SURFACE,
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IRIS_MEMZONE_SHADER,
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IRIS_MEMZONE_SURFACE,
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IRIS_MEMZONE_DYNAMIC,
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IRIS_MEMZONE_OTHER,
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IRIS_MEMZONE_BINDER,
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@ -48,6 +78,13 @@ enum iris_memory_zone {
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/* Intentionally exclude IRIS_MEMZONE_BINDER */
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#define IRIS_MEMZONE_COUNT (IRIS_MEMZONE_OTHER + 1)
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#define IRIS_MEMZONE_SHADER_START (0 * (1ull << 32))
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#define IRIS_MEMZONE_SURFACE_START (1 * (1ull << 32))
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#define IRIS_MEMZONE_DYNAMIC_START (2 * (1ull << 32))
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#define IRIS_MEMZONE_OTHER_START (3 * (1ull << 32))
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#define IRIS_BINDER_ADDRESS IRIS_MEMZONE_SURFACE_START
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struct iris_bo {
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/**
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* Size in bytes of the buffer object.
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@ -361,8 +361,9 @@ iris_init_render_context(struct iris_screen *screen,
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sba.IndirectObjectBufferSizeModifyEnable = true;
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sba.InstructionBuffersizeModifyEnable = true;
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sba.SurfaceStateBaseAddress = ro_bo(NULL, 1ull << 32);
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sba.DynamicStateBaseAddress = ro_bo(NULL, 2 * (1ull << 32));
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sba.InstructionBaseAddress = ro_bo(NULL, IRIS_MEMZONE_SHADER_START);
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sba.SurfaceStateBaseAddress = ro_bo(NULL, IRIS_MEMZONE_SURFACE_START);
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sba.DynamicStateBaseAddress = ro_bo(NULL, IRIS_MEMZONE_DYNAMIC_START);
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sba.GeneralStateBufferSize = 0xfffff;
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sba.IndirectObjectBufferSize = 0xfffff;
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