diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 14f2afa48a5..74e9a4db7d5 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -6181,18 +6181,14 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) unreachable("should be lowered"); case nir_tex_src_texture_offset: { - /* Emit code to evaluate the actual indexing expression */ - fs_reg tmp = vgrf(glsl_type::uint_type); - bld.ADD(tmp, src, brw_imm_ud(texture)); - srcs[TEX_LOGICAL_SRC_SURFACE] = bld.emit_uniformize(tmp); + assert(srcs[TEX_LOGICAL_SRC_SURFACE].is_zero()); + srcs[TEX_LOGICAL_SRC_SURFACE] = bld.emit_uniformize(src); break; } case nir_tex_src_sampler_offset: { - /* Emit code to evaluate the actual indexing expression */ - fs_reg tmp = vgrf(glsl_type::uint_type); - bld.ADD(tmp, src, brw_imm_ud(sampler)); - srcs[TEX_LOGICAL_SRC_SAMPLER] = bld.emit_uniformize(tmp); + assert(srcs[TEX_LOGICAL_SRC_SAMPLER].is_zero()); + srcs[TEX_LOGICAL_SRC_SAMPLER] = bld.emit_uniformize(src); break; } diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 7a0c7653ea7..c903cccb09d 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -1603,6 +1603,7 @@ brw_nir_apply_sampler_key(nir_shader *nir, .lower_txd_clamp_bindless_sampler = true, .lower_txd_clamp_if_sampler_index_not_lt_16 = true, .lower_invalid_implicit_lod = true, + .lower_index_to_offset = true, }; /* Iron Lake and prior require lowering of all rectangle textures */ diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 76515386e97..0a9156cdae0 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -2022,20 +2022,14 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) break; case nir_tex_src_texture_offset: { - /* Emit code to evaluate the actual indexing expression */ - src_reg src = get_nir_src(instr->src[i].src, 1); - src_reg temp(this, glsl_type::uint_type); - emit(ADD(dst_reg(temp), src, brw_imm_ud(texture))); - texture_reg = emit_uniformize(temp); + assert(texture_reg.is_zero()); + texture_reg = emit_uniformize(get_nir_src(instr->src[i].src, 1)); break; } case nir_tex_src_sampler_offset: { - /* Emit code to evaluate the actual indexing expression */ - src_reg src = get_nir_src(instr->src[i].src, 1); - src_reg temp(this, glsl_type::uint_type); - emit(ADD(dst_reg(temp), src, brw_imm_ud(sampler))); - sampler_reg = emit_uniformize(temp); + assert(sampler_reg.is_zero()); + sampler_reg = emit_uniformize(get_nir_src(instr->src[i].src, 1)); break; }