fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-04-25 15:40:46 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

etnaviv: fix alpha test on GC3000

Browse source 
Store ref_value in PE_STENCIL_CONFIG_EXT as done by blob.

Fixes following piglits:
 spec@ext_framebuffer_object@fbo-alphatest-formats
 spec@ext_packed_float@fbo-alphatest-formats
 spec@ext_texture_srgb@fbo-alphatest-formats

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
This commit is contained in:
Christian Gmeiner 2020-01-17 10:32:33 +01:00 • committed by Marge Bot
parent f95fa3d1ac
commit 83f54e3c54
3 changed files with 15 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/gallium/drivers/etnaviv/etnaviv_emit.c
View file

@ -519,8 +519,9 @@ etna_emit_state(struct etna_context *ctx)
abort();
}
}
if (unlikely(dirty & (ETNA_DIRTY_STENCIL_REF | ETNA_DIRTY_RASTERIZER))) {
/*014A0*/ EMIT_STATE(PE_STENCIL_CONFIG_EXT, ctx->stencil_ref.PE_STENCIL_CONFIG_EXT[ccw]);
if (unlikely(dirty & (ETNA_DIRTY_STENCIL_REF | ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_ZSA))) {
uint32_t val = etna_zsa_state(ctx->zsa)->PE_STENCIL_CONFIG_EXT;
/*014A0*/ EMIT_STATE(PE_STENCIL_CONFIG_EXT, val | ctx->stencil_ref.PE_STENCIL_CONFIG_EXT[ccw]);
}
if (unlikely(dirty & (ETNA_DIRTY_BLEND | ETNA_DIRTY_FRAMEBUFFER))) {
struct etna_blend_state *blend = etna_blend_state(ctx->blend);

11
src/gallium/drivers/etnaviv/etnaviv_zsa.c
View file

@ -29,6 +29,7 @@
#include "etnaviv_context.h"
#include "etnaviv_screen.h"
#include "etnaviv_translate.h"
#include "util/u_half.h"
#include "util/u_memory.h"
#include "hw/common.xml.h"
@ -38,6 +39,7 @@ etna_zsa_state_create(struct pipe_context *pctx,
const struct pipe_depth_stencil_alpha_state *so)
{
struct etna_context *ctx = etna_context(pctx);
struct etna_screen *screen = ctx->screen;
struct etna_zsa_state *cs = CALLOC_STRUCT(etna_zsa_state);
if (!cs)
@ -92,6 +94,15 @@ etna_zsa_state_create(struct pipe_context *pctx,
if (so->depth.enabled == false || so->depth.func == PIPE_FUNC_ALWAYS)
early_z = false;
/* calculate extra_reference value */
uint32_t extra_reference = 0;
if (VIV_FEATURE(screen, chipMinorFeatures1, HALF_FLOAT))
extra_reference = util_float_to_half(CLAMP(so->alpha.ref_value, 0.0f, 1.0f));
cs->PE_STENCIL_CONFIG_EXT =
VIVS_PE_STENCIL_CONFIG_EXT_EXTRA_ALPHA_REF(extra_reference);
/* compare funcs have 1 to 1 mapping */
cs->PE_DEPTH_CONFIG =
VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC(so->depth.enabled ? so->depth.func

1
src/gallium/drivers/etnaviv/etnaviv_zsa.h
View file

@ -37,6 +37,7 @@ struct etna_zsa_state {
uint32_t PE_ALPHA_OP;
uint32_t PE_STENCIL_OP[2];
uint32_t PE_STENCIL_CONFIG[2];
uint32_t PE_STENCIL_CONFIG_EXT;
uint32_t PE_STENCIL_CONFIG_EXT2[2];
};