fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 13:58:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

i965: Move the remaining driver debug over to stderr.

Browse source 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Eric Anholt 2013-12-23 00:56:20 -08:00
parent a76e5dce4f
commit 83daa88035
12 changed files with 66 additions and 63 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/mesa/drivers/dri/i965/brw_context.c
View file

@ -602,7 +602,7 @@ brwCreateContext(gl_api api,
struct brw_context *brw = rzalloc(NULL, struct brw_context);
if (!brw) {
printf("%s: failed to alloc context\n", __FUNCTION__);
fprintf(stderr, "%s: failed to alloc context\n", __FUNCTION__);
*dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
return false;
}
@ -658,7 +658,7 @@ brwCreateContext(gl_api api,
if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) {
*dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
printf("%s: failed to init mesa context\n", __FUNCTION__);
fprintf(stderr, "%s: failed to init mesa context\n", __FUNCTION__);
intelDestroyContext(driContextPriv);
return false;
}

26
src/mesa/drivers/dri/i965/brw_curbe.c
View file

@ -114,13 +114,13 @@ static void calculate_curbe_offsets( struct brw_context *brw )
brw->curbe.total_size = reg;
if (0)
printf("curbe wm %d+%d clip %d+%d vs %d+%d\n",
brw->curbe.wm_start,
brw->curbe.wm_size,
brw->curbe.clip_start,
brw->curbe.clip_size,
brw->curbe.vs_start,
brw->curbe.vs_size );
fprintf(stderr, "curbe wm %d+%d clip %d+%d vs %d+%d\n",
brw->curbe.wm_start,
brw->curbe.wm_size,
brw->curbe.clip_start,
brw->curbe.clip_size,
brw->curbe.vs_start,
brw->curbe.vs_size );
brw->state.dirty.brw |= BRW_NEW_CURBE_OFFSETS;
}
@ -244,13 +244,13 @@ brw_upload_constant_buffer(struct brw_context *brw)
if (0) {
for (i = 0; i < sz*16; i+=4)
printf("curbe %d.%d: %f %f %f %f\n", i/8, i&4,
buf[i+0], buf[i+1], buf[i+2], buf[i+3]);
fprintf(stderr, "curbe %d.%d: %f %f %f %f\n", i/8, i&4,
buf[i+0], buf[i+1], buf[i+2], buf[i+3]);
printf("last_buf %p buf %p sz %d/%d cmp %d\n",
brw->curbe.last_buf, buf,
bufsz, brw->curbe.last_bufsz,
brw->curbe.last_buf ? memcmp(buf, brw->curbe.last_buf, bufsz) : -1);
fprintf(stderr, "last_buf %p buf %p sz %d/%d cmp %d\n",
brw->curbe.last_buf, buf,
bufsz, brw->curbe.last_bufsz,
brw->curbe.last_buf ? memcmp(buf, brw->curbe.last_buf, bufsz) : -1);
}
if (brw->curbe.curbe_bo != NULL &&

8
src/mesa/drivers/dri/i965/brw_draw_upload.c
View file

@ -229,9 +229,9 @@ brw_get_vertex_surface_type(struct brw_context *brw,
int size = glarray->Size;
if (unlikely(INTEL_DEBUG & DEBUG_VERTS))
printf("type %s size %d normalized %d\n",
_mesa_lookup_enum_by_nr(glarray->Type),
glarray->Size, glarray->Normalized);
fprintf(stderr, "type %s size %d normalized %d\n",
_mesa_lookup_enum_by_nr(glarray->Type),
glarray->Size, glarray->Normalized);
if (glarray->Integer) {
assert(glarray->Format == GL_RGBA); /* sanity check */
@ -428,7 +428,7 @@ brw_prepare_vertices(struct brw_context *brw)
}
if (0)
printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
fprintf(stderr, "%s %d..%d\n", __FUNCTION__, min_index, max_index);
/* Accumulate the list of enabled arrays. */
brw->vb.nr_enabled = 0;

8
src/mesa/drivers/dri/i965/brw_eu_compact.c
View file

@ -592,15 +592,15 @@ void brw_debug_compact_uncompact(struct brw_context *brw,
uint32_t *before_bits = (uint32_t *)orig;
uint32_t *after_bits = (uint32_t *)uncompacted;
printf(" changed bits:\n");
fprintf(stderr, " changed bits:\n");
for (int i = 0; i < 128; i++) {
uint32_t before = before_bits[i / 32] & (1 << (i & 31));
uint32_t after = after_bits[i / 32] & (1 << (i & 31));
if (before != after) {
printf(" bit %d, %s to %s\n", i,
before ? "set" : "unset",
after ? "set" : "unset");
fprintf(stderr, " bit %d, %s to %s\n", i,
before ? "set" : "unset",
after ? "set" : "unset");
}
}
}

6
src/mesa/drivers/dri/i965/brw_eu_emit.c
View file

@ -780,8 +780,10 @@ brw_next_insn(struct brw_compile *p, unsigned opcode)
struct brw_instruction *insn;
if (p->nr_insn + 1 > p->store_size) {
if (0)
printf("incresing the store size to %d\n", p->store_size << 1);
if (0) {
fprintf(stderr, "incresing the store size to %d\n",
p->store_size << 1);
}
p->store_size <<= 1;
p->store = reralloc(p->mem_ctx, p->store,
struct brw_instruction, p->store_size);

12
src/mesa/drivers/dri/i965/brw_interpolation_map.c
View file

@ -85,18 +85,18 @@ brw_setup_vue_interpolation(struct brw_context *brw)
}
if (unlikely(INTEL_DEBUG & DEBUG_VUE)) {
printf("VUE map:\n");
fprintf(stderr, "VUE map:\n");
for (int i = 0; i < vue_map->num_slots; i++) {
int varying = vue_map->slot_to_varying[i];
if (varying == -1) {
printf("%d: --\n", i);
fprintf(stderr, "%d: --\n", i);
continue;
}
printf("%d: %d %s ofs %d\n",
i, varying,
get_qual_name(brw->interpolation_mode.mode[i]),
brw_vue_slot_to_offset(i));
fprintf(stderr, "%d: %d %s ofs %d\n",
i, varying,
get_qual_name(brw->interpolation_mode.mode[i]),
brw_vue_slot_to_offset(i));
}
}
}

22
src/mesa/drivers/dri/i965/brw_program.c
View file

@ -320,17 +320,17 @@ static void
print_shader_time_line(const char *stage, const char *name,
int shader_num, uint64_t time, uint64_t total)
{
printf("%-6s%-18s", stage, name);
fprintf(stderr, "%-6s%-18s", stage, name);
if (shader_num != -1)
printf("%4d: ", shader_num);
fprintf(stderr, "%4d: ", shader_num);
else
printf(" : ");
fprintf(stderr, " : ");
printf("%16lld (%7.2f Gcycles) %4.1f%%\n",
(long long)time,
(double)time / 1000000000.0,
(double)time / total * 100.0);
fprintf(stderr, "%16lld (%7.2f Gcycles) %4.1f%%\n",
(long long)time,
(double)time / 1000000000.0,
(double)time / total * 100.0);
}
static void
@ -401,14 +401,14 @@ brw_report_shader_time(struct brw_context *brw)
}
if (total == 0) {
printf("No shader time collected yet\n");
fprintf(stderr, "No shader time collected yet\n");
return;
}
qsort(sorted, brw->shader_time.num_entries, sizeof(sorted[0]), compare_time);
printf("\n");
printf("type ID cycles spent %% of total\n");
fprintf(stderr, "\n");
fprintf(stderr, "type ID cycles spent %% of total\n");
for (int s = 0; s < brw->shader_time.num_entries; s++) {
const char *shader_name;
const char *stage;
@ -470,7 +470,7 @@ brw_report_shader_time(struct brw_context *brw)
scaled[i], total);
}
printf("\n");
fprintf(stderr, "\n");
print_shader_time_line("total", "vs", -1, total_by_type[ST_VS], total);
print_shader_time_line("total", "gs", -1, total_by_type[ST_GS], total);
print_shader_time_line("total", "fs8", -1, total_by_type[ST_FS8], total);

19
src/mesa/drivers/dri/i965/brw_urb.c
View file

@ -185,23 +185,24 @@ static void recalculate_urb_fence( struct brw_context *brw )
* entries and the values for minimum nr of entries
* provided above.
*/
printf("couldn't calculate URB layout!\n");
fprintf(stderr, "couldn't calculate URB layout!\n");
exit(1);
}
if (unlikely(INTEL_DEBUG & (DEBUG_URB|DEBUG_PERF)))
printf("URB CONSTRAINED\n");
fprintf(stderr, "URB CONSTRAINED\n");
}
done:
if (unlikely(INTEL_DEBUG & DEBUG_URB))
printf("URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF.. %d ..CS.. %d\n",
brw->urb.vs_start,
brw->urb.gs_start,
brw->urb.clip_start,
brw->urb.sf_start,
brw->urb.cs_start,
brw->urb.size);
fprintf(stderr,
"URB fence: %d ..VS.. %d ..GS.. %d ..CLP.. %d ..SF.. %d ..CS.. %d\n",
brw->urb.vs_start,
brw->urb.gs_start,
brw->urb.clip_start,
brw->urb.sf_start,
brw->urb.cs_start,
brw->urb.size);
brw->state.dirty.brw |= BRW_NEW_URB_FENCE;
}

4
src/mesa/drivers/dri/i965/brw_vs_surface_state.c
View file

@ -78,8 +78,8 @@ brw_upload_vec4_pull_constants(struct brw_context *brw,
if (0) {
for (i = 0; i < ALIGN(prog_data->base.nr_pull_params, 4) / 4; i++) {
float *row = (float *)stage_state->const_bo->virtual + i * 4;
printf("const surface %3d: %4.3f %4.3f %4.3f %4.3f\n",
i, row[0], row[1], row[2], row[3]);
fprintf(stderr, "const surface %3d: %4.3f %4.3f %4.3f %4.3f\n",
i, row[0], row[1], row[2], row[3]);
}
}

6
src/mesa/drivers/dri/i965/gen6_vs_state.c
View file

@ -71,11 +71,11 @@ gen6_upload_vec4_push_constants(struct brw_context *brw,
params_uploaded = prog_data->base.nr_params / 4;
if (0) {
printf("Constant buffer:\n");
fprintf(stderr, "Constant buffer:\n");
for (i = 0; i < params_uploaded; i++) {
float *buf = param + i * 4;
printf("%d: %f %f %f %f\n",
i, buf[0], buf[1], buf[2], buf[3]);
fprintf(stderr, "%d: %f %f %f %f\n",
i, buf[0], buf[1], buf[2], buf[3]);
}
}

12
src/mesa/drivers/dri/i965/gen6_wm_state.c
View file

@ -66,17 +66,17 @@ gen6_upload_wm_push_constants(struct brw_context *brw)
}
if (0) {
printf("WM constants:\n");
fprintf(stderr, "WM constants:\n");
for (i = 0; i < prog_data->base.nr_params; i++) {
if ((i & 7) == 0)
printf("g%d: ", prog_data->first_curbe_grf + i / 8);
printf("%8f ", constants[i]);
fprintf(stderr, "g%d: ", prog_data->first_curbe_grf + i / 8);
fprintf(stderr, "%8f ", constants[i]);
if ((i & 7) == 7)
printf("\n");
fprintf(stderr, "\n");
}
if ((i & 7) != 0)
printf("\n");
printf("\n");
fprintf(stderr, "\n");
fprintf(stderr, "\n");
}
brw->wm.base.push_const_size = ALIGN(prog_data->base.nr_params, 8) / 8;

2
src/mesa/drivers/dri/i965/intel_debug.h
View file

@ -70,7 +70,7 @@ extern int INTEL_DEBUG;
#endif
#define dbg_printf(...) ALOGW(__VA_ARGS__)
#else
#define dbg_printf(...) printf(__VA_ARGS__)
#define dbg_printf(...) fprintf(stderr, __VA_ARGS__)
#endif /* HAVE_ANDROID_PLATFORM */
#define DBG(...) do { \