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kraid: Add the hardware MkVec ops
The hardware doesn't have MKVEC.v4i8 in it's current form. Instead, it has a MKVEC.v4i8 that takes two i8's and an i16 and you have to do two of them in order to build a full MKVEC.v4i8. It also has a MKVEC.v2i16 which does exactly what it says on the tin. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42200>
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b4a18ad2c7
commit
83a01dd382
2 changed files with 105 additions and 3 deletions
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@ -211,10 +211,9 @@ fn src_fau_page(src: &Src) -> Option<u8> {
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}
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}
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fn op_encode_src(op: &impl Opcode, src: &Src) -> v9::EncodedSrc {
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fn encode_typed_src(src: &Src, src_type: DataType) -> v9::EncodedSrc {
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let encoded = encode_src_ref(&src.src_ref, src.last_use);
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let src_type = op.src_type(src);
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if src_type.bits() == 64 && !src.src_ref.is_small_const() {
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assert_eq!(encoded & 0x01, 0);
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}
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@ -242,6 +241,10 @@ fn op_encode_src(op: &impl Opcode, src: &Src) -> v9::EncodedSrc {
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}
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}
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fn op_encode_src(op: &impl Opcode, src: &Src) -> v9::EncodedSrc {
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encode_typed_src(src, op.src_type(src))
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}
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fn op_encode_dst(op: &impl Opcode, dst: &Dst) -> v9::EncodedDst {
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let DstRef::Reg(reg) = &dst.dst_ref else {
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panic!("Destination must be a register");
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@ -768,6 +771,53 @@ impl V9Instr for OpLoad {
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}
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}
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impl V9Instr for OpMkVecV2I8I16 {
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fn get_info(&self, arch: u8) -> Option<V9InstrInfo> {
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V9InstrInfo::from_isa(
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Mkvec::get_info(MkvecVariant::V2I8, arch),
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src_map! {
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src0: srcs[0],
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src1: srcs[1],
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},
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)
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}
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fn encode(&self, e: V9Encoder) -> EncodedInstr {
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e.encode(Mkvec {
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variant: MkvecVariant::V2I8,
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dst: op_encode_dst(self, &self.dst),
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src0: op_encode_src(self, &self.srcs[0]),
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src1: op_encode_src(self, &self.srcs[1]),
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// This one is weird. It's labled i16 in ops.rs because that's
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// really what it is but we need to use v2i8 to get it to encode
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// correctly.
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src2: Some(encode_typed_src(&self.accum, DataType::V2I8)),
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})
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}
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}
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impl V9Instr for OpMkVecV2I16 {
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fn get_info(&self, arch: u8) -> Option<V9InstrInfo> {
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V9InstrInfo::from_isa(
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Mkvec::get_info(MkvecVariant::V2I16, arch),
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src_map! {
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src0: srcs[0],
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src1: srcs[1],
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},
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)
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}
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fn encode(&self, e: V9Encoder) -> EncodedInstr {
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e.encode(Mkvec {
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variant: MkvecVariant::V2I16,
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dst: op_encode_dst(self, &self.dst),
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src0: op_encode_src(self, &self.srcs[0]),
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src1: op_encode_src(self, &self.srcs[1]),
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src2: None,
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})
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}
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}
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impl V9Instr for OpMov {
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fn get_info(&self, arch: u8) -> Option<V9InstrInfo> {
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V9InstrInfo::from_isa(
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@ -1021,6 +1071,8 @@ macro_rules! v9_op_match_else {
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Op::LdPka($x) => $y,
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Op::LeaPka($x) => $y,
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Op::Load($x) => $y,
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Op::MkVecV2I8I16($x) => $y,
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Op::MkVecV2I16($x) => $y,
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Op::Mov($x) => $y,
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Op::Nop($x) => $y,
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Op::ShiftLop($x) => $y,
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@ -445,7 +445,55 @@ impl fmt::Display for OpMkVecV2I8 {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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write!(
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f,
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"{} = MKVEC.v4i8 {} {}",
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"{} = MKVEC.v2i8 {} {}",
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&self.dst,
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self.fmt_src(&self.srcs[0]),
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self.fmt_src(&self.srcs[1]),
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)
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}
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}
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#[repr(C)]
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#[derive(Clone, Opcode)]
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pub struct OpMkVecV2I8I16 {
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#[dst_type(V4I8)]
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pub dst: Dst,
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#[src_type(I8)]
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pub srcs: [Src; 2],
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#[src_type(I16)]
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pub accum: Src,
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}
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impl fmt::Display for OpMkVecV2I8I16 {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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write!(
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f,
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"{} = MKVEC.v2i8+i16 {} {} {}",
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&self.dst,
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self.fmt_src(&self.srcs[0]),
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self.fmt_src(&self.srcs[1]),
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self.fmt_src(&self.accum),
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)
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}
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}
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#[repr(C)]
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#[derive(Clone, Opcode)]
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pub struct OpMkVecV2I16 {
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#[dst_type(V2I16)]
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pub dst: Dst,
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#[src_type(I16)]
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pub srcs: [Src; 2],
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}
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impl fmt::Display for OpMkVecV2I16 {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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write!(
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f,
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"{} = MKVEC.v2i16 {} {}",
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&self.dst,
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self.fmt_src(&self.srcs[0]),
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self.fmt_src(&self.srcs[1]),
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@ -671,6 +719,8 @@ pub enum Op {
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LdPka(Box<OpLdPka>),
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Load(Box<OpLoad>),
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MkVecV2I8(Box<OpMkVecV2I8>),
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MkVecV2I8I16(Box<OpMkVecV2I8I16>),
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MkVecV2I16(Box<OpMkVecV2I16>),
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MkVecV4I8(Box<OpMkVecV4I8>),
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Nop(OpNop),
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Mov(Box<OpMov>),
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