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nvc0/ir: do not lower shared+atomics on GM107+

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For Maxwell, the ATOMS instruction can be used to perform atomic
operations on shared memory instead of this load/store lowering pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Samuel Pitoiset 2016-03-07 18:56:21 +01:00
parent 543fb95473
commit 839a469166
1 changed files with 10 additions and 7 deletions
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17
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
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@ -1288,11 +1288,12 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
sv = SV_LBASE;
break;
case FILE_MEMORY_SHARED:
if (targ->getChipset() >= NVISA_GK104_CHIPSET) {
handleSharedATOMNVE4(atom);
} else {
// For Fermi/Kepler, we have to use ld lock/st unlock to perform atomic
// operations on shared memory. For Maxwell, ATOMS is enough.
if (targ->getChipset() < NVISA_GK104_CHIPSET)
handleSharedATOM(atom);
}
else if (targ->getChipset() < NVISA_GM107_CHIPSET)
handleSharedATOMNVE4(atom);
return true;
default:
assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
@ -1320,9 +1321,11 @@ NVC0LoweringPass::handleATOM(Instruction *atom)
bool
NVC0LoweringPass::handleCasExch(Instruction *cas, bool needCctl)
{
if (cas->src(0).getFile() == FILE_MEMORY_SHARED) {
// ATOM_CAS and ATOM_EXCH are handled in handleSharedATOM().
return false;
if (targ->getChipset() < NVISA_GM107_CHIPSET) {
if (cas->src(0).getFile() == FILE_MEMORY_SHARED) {
// ATOM_CAS and ATOM_EXCH are handled in handleSharedATOM().
return false;
}
}
if (cas->subOp != NV50_IR_SUBOP_ATOM_CAS &&