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nvk: Add a macro to set MMIO registers via falcons
Signed-off-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24326>
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commit
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3 changed files with 54 additions and 1 deletions
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@ -35,6 +35,44 @@ nvk_cmd_buffer_3d_cls(struct nvk_cmd_buffer *cmd)
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return nvk_cmd_buffer_device(cmd)->ctx->eng3d.cls;
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}
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void
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nvk_mme_set_priv_reg(struct mme_builder *b)
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{
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mme_mthd(b, NV9097_WAIT_FOR_IDLE);
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mme_emit(b, mme_zero());
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mme_mthd(b, NV9097_SET_MME_SHADOW_SCRATCH(0));
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mme_emit(b, mme_zero());
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mme_emit(b, mme_load(b));
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mme_emit(b, mme_load(b));
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/* Not sure if this has to strictly go before SET_FALCON04, but it might.
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* We also don't really know what that value indicates and when and how it's
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* set.
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*/
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struct mme_value s26 = mme_state(b, NV9097_SET_MME_SHADOW_SCRATCH(26));
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s26 = mme_merge(b, mme_zero(), s26, 0, 8, 0);
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mme_mthd(b, NV9097_SET_FALCON04);
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mme_emit(b, mme_load(b));
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mme_if(b, ieq, s26, mme_imm(2)) {
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struct mme_value loop_cond = mme_mov(b, mme_zero());
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mme_while(b, ine, loop_cond, mme_imm(1)) {
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mme_state_to(b, loop_cond, NV9097_SET_MME_SHADOW_SCRATCH(0));
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mme_mthd(b, NV9097_NO_OPERATION);
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mme_emit(b, mme_zero());
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};
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}
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mme_if(b, ine, s26, mme_imm(2)) {
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mme_loop(b, mme_imm(10)) {
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mme_mthd(b, NV9097_NO_OPERATION);
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mme_emit(b, mme_zero());
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}
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}
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}
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VkResult
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nvk_queue_init_context_draw_state(struct nvk_queue *queue)
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{
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@ -93,6 +131,18 @@ nvk_queue_init_context_draw_state(struct nvk_queue *queue)
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free(dw);
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}
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/* Enable FP hepler invocation memory loads
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*
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* On older generations we'll let the kernel do it, but starting with GSP we
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* have to do it this way.
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*/
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if (dev->ctx->eng3d.cls >= TURING_A) {
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P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_SET_PRIV_REG));
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P_INLINE_DATA(p, 0);
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P_INLINE_DATA(p, BITFIELD_BIT(3));
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P_INLINE_DATA(p, 0x419ba4);
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}
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P_IMMD(p, NV9097, SET_RENDER_ENABLE_C, MODE_TRUE);
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P_IMMD(p, NV9097, SET_Z_COMPRESSION, ENABLE_TRUE);
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@ -16,7 +16,8 @@ static const nvk_mme_builder_func mme_builders[NVK_MME_COUNT] = {
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[NVK_MME_WRITE_CS_INVOCATIONS] = nvk_mme_write_cs_invocations,
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[NVK_MME_COPY_QUERIES] = nvk_mme_copy_queries,
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[NVK_MME_XFB_COUNTER_LOAD] = nvk_mme_xfb_counter_load,
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[NVK_MME_XFB_DRAW_INDIRECT] = nvk_mme_xfb_draw_indirect
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[NVK_MME_XFB_DRAW_INDIRECT] = nvk_mme_xfb_draw_indirect,
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[NVK_MME_SET_PRIV_REG] = nvk_mme_set_priv_reg,
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};
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uint32_t *
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@ -20,6 +20,7 @@ enum nvk_mme {
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NVK_MME_COPY_QUERIES,
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NVK_MME_XFB_COUNTER_LOAD,
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NVK_MME_XFB_DRAW_INDIRECT,
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NVK_MME_SET_PRIV_REG,
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NVK_MME_COUNT,
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};
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@ -52,5 +53,6 @@ void nvk_mme_write_cs_invocations(struct mme_builder *b);
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void nvk_mme_copy_queries(struct mme_builder *b);
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void nvk_mme_xfb_counter_load(struct mme_builder *b);
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void nvk_mme_xfb_draw_indirect(struct mme_builder *b);
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void nvk_mme_set_priv_reg(struct mme_builder *b);
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#endif /* NVK_MME_H */
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