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gallivm/nir: extract a valid texture index according to exec_mask.

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When using indirect textures, some lanes may not be active,
particularly in a loop, so as with some other areas, extracting
the correct lane is needed here. This extracts the last valid one.

KHR-GL45.texture_barrier.* on zink.

Fixes: e168d148d7 ("gallivm/nir: handle non-uniform texture offsets")

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15259>
This commit is contained in:
Dave Airlie 2022-03-07 17:03:25 +10:00 • committed by Marge Bot
parent e449acac9d
commit 8346983775
2 changed files with 20 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

24
src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c
View file

@ -1449,6 +1449,7 @@ static void emit_tex(struct lp_build_nir_context *bld_base,
{
struct lp_build_nir_soa_context *bld = (struct lp_build_nir_soa_context *)bld_base;
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = bld_base->base.gallivm->builder;
params->type = bld_base->base.type;
params->context_ptr = bld->context_ptr;
@ -1502,10 +1503,25 @@ static void emit_tex(struct lp_build_nir_context *bld_base,
return;
}
if (params->texture_index_offset)
params->texture_index_offset = LLVMBuildExtractElement(bld_base->base.gallivm->builder,
params->texture_index_offset,
lp_build_const_int32(bld_base->base.gallivm, 0), "");
if (params->texture_index_offset) {
struct lp_build_loop_state loop_state;
LLVMValueRef exec_mask = mask_vec(bld_base);
LLVMValueRef outer_cond = LLVMBuildICmp(builder, LLVMIntNE, exec_mask, bld_base->uint_bld.zero, "");
LLVMValueRef res_store = lp_build_alloca(gallivm, bld_base->uint_bld.elem_type, "");
lp_build_loop_begin(&loop_state, gallivm, lp_build_const_int32(gallivm, 0));
LLVMValueRef if_cond = LLVMBuildExtractElement(gallivm->builder, outer_cond, loop_state.counter, "");
struct lp_build_if_state ifthen;
lp_build_if(&ifthen, gallivm, if_cond);
LLVMValueRef value_ptr = LLVMBuildExtractElement(gallivm->builder, params->texture_index_offset,
loop_state.counter, "");
LLVMBuildStore(builder, value_ptr, res_store);
lp_build_endif(&ifthen);
lp_build_loop_end_cond(&loop_state, lp_build_const_int32(gallivm, bld_base->uint_bld.type.length),
NULL, LLVMIntUGE);
LLVMValueRef idx_val = LLVMBuildLoad(builder, res_store, "");
params->texture_index_offset = idx_val;
}
params->type = bld_base->base.type;
bld->sampler->emit_tex_sample(bld->sampler,

4
src/gallium/drivers/zink/ci/zink-lvp-fails.txt
View file

@ -12,10 +12,6 @@ KHR-GL46.tessellation_shader.tessellation_shader_quads_tessellation.degenerate_c
KHR-GL46.tessellation_shader.tessellation_shader_quads_tessellation.inner_tessellation_level_rounding,Fail
KHR-GL46.tessellation_shader.tessellation_shader_tessellation.gl_InvocationID_PatchVerticesIn_PrimitiveID,Fail
KHR-GL46.tessellation_shader.vertex.vertex_spacing,Fail
KHR-GL46.texture_barrier_ARB.disjoint-texels,Fail
KHR-GL46.texture_barrier_ARB.overlapping-texels,Fail
KHR-GL46.texture_barrier.disjoint-texels,Fail
KHR-GL46.texture_barrier.overlapping-texels,Fail
KHR-GL46.texture_view.view_sampling,Fail
dEQP-GLES2.functional.clipping.point.wide_point_clip,Fail