fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-07 15:10:12 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

i965/fs: Use exec_size instead of dst.width for computing component size

Browse source 
There are a variety of places where we use dst.width / 8 to compute the
size of a single logical channel.  Instead, we should be using exec_size.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
This commit is contained in:
Jason Ekstrand 2015-06-18 13:49:22 -07:00
parent 9a0c883292
commit 83458e7c53
5 changed files with 8 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -2280,12 +2280,12 @@ fs_visitor::opt_register_renaming()
if (depth == 0 &&
inst->dst.file == GRF &&
alloc.sizes[inst->dst.reg] == inst->dst.width / 8 &&
alloc.sizes[inst->dst.reg] == inst->exec_size / 8 &&
!inst->is_partial_write()) {
if (remap[dst] == -1) {
remap[dst] = dst;
} else {
remap[dst] = alloc.allocate(inst->dst.width / 8);
remap[dst] = alloc.allocate(inst->exec_size / 8);
inst->dst.reg = remap[dst];
progress = true;
}
@ -2416,7 +2416,7 @@ fs_visitor::compute_to_mrf()
/* Things returning more than one register would need us to
* understand coalescing out more than one MOV at a time.
*/
if (scan_inst->regs_written > scan_inst->dst.width / 8)
if (scan_inst->regs_written > scan_inst->exec_size / 8)
break;
/* SEND instructions can't have MRF as a destination. */

2
src/mesa/drivers/dri/i965/brw_fs_cse.cpp
View file

@ -179,7 +179,7 @@ static void
create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate)
{
int written = inst->regs_written;
int dst_width = inst->dst.width / 8;
int dst_width = inst->exec_size / 8;
const fs_builder ubld = bld.group(inst->exec_size, inst->force_sechalf)
.exec_all(inst->force_writemask_all);
fs_inst *copy;

2
src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp
View file

@ -196,7 +196,7 @@ fs_visitor::register_coalesce()
continue;
}
reg_to_offset[offset] = inst->dst.reg_offset;
if (inst->src[0].width == 16)
if (inst->exec_size == 16)
reg_to_offset[offset + 1] = inst->dst.reg_offset + 1;
mov[offset] = inst;
channels_remaining -= inst->regs_written;

2
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
View file

@ -913,7 +913,7 @@ fs_visitor::emit_texture(ir_texture_opcode op,
bld.emit(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, fs_reg(6));
fs_reg *fixed_payload = ralloc_array(mem_ctx, fs_reg, inst->regs_written);
int components = inst->regs_written / (dst.width / 8);
int components = inst->regs_written / (inst->exec_size / 8);
for (int i = 0; i < components; i++) {
if (i == 2) {
fixed_payload[i] = fixed_depth;

4
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
View file

@ -1314,8 +1314,8 @@ fs_instruction_scheduler::choose_instruction_to_schedule()
* single-result send is probably actually reducing register
* pressure.
*/
if (inst->regs_written <= inst->dst.width / 8 &&
chosen_inst->regs_written > chosen_inst->dst.width / 8) {
if (inst->regs_written <= inst->exec_size / 8 &&
chosen_inst->regs_written > chosen_inst->exec_size / 8) {
chosen = n;
continue;
} else if (inst->regs_written > chosen_inst->regs_written) {