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radeon/llvm: Update and fix some comments

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This commit is contained in:
Tom Stellard 2012-05-29 11:59:01 -04:00
parent 89ece086bc
commit 83169900fb
2 changed files with 6 additions and 12 deletions
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8
src/gallium/drivers/radeon/R600ISelLowering.cpp
View file

@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
// Most of the DAG lowering is handled in AMDILISelLowering.cpp. This file
// Most of the DAG lowering is handled in AMDGPUISelLowering.cpp. This file
// is mostly EmitInstrWithCustomInserter().
//
//===----------------------------------------------------------------------===//
@ -39,12 +39,6 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FSUB, MVT::f32, Expand);
#if 0
setTargetDAGCombine(ISD::Constant);
setTargetDAGCombine(ISD::ConstantFP);
#endif
}
MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(

10
src/gallium/drivers/radeon/SIISelLowering.cpp
View file

@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
// Most of the DAG lowering is handled in AMDILISelLowering.cpp. This file is
// Most of the DAG lowering is handled in AMDGPUISelLowering.cpp. This file is
// mostly EmitInstrWithCustomInserter().
//
//===----------------------------------------------------------------------===//
@ -61,8 +61,8 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::V_MOV_B32_e64))
.addOperand(MI->getOperand(0))
.addOperand(MI->getOperand(1))
/* VSRC1-2 are unused, but we still need to fill all the
* operand slots, so we just reuse the VSRC0 operand */
// VSRC1-2 are unused, but we still need to fill all the
// operand slots, so we just reuse the VSRC0 operand
.addOperand(MI->getOperand(1))
.addOperand(MI->getOperand(1))
.addImm(0) // ABS
@ -76,8 +76,8 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::V_MOV_B32_e64))
.addOperand(MI->getOperand(0))
.addOperand(MI->getOperand(1))
/* VSRC1-2 are unused, but we still need to fill all the
* operand slots, so we just reuse the VSRC0 operand */
// VSRC1-2 are unused, but we still need to fill all the
// operand slots, so we just reuse the VSRC0 operand
.addOperand(MI->getOperand(1))
.addOperand(MI->getOperand(1))
.addImm(1) // ABS