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amd/common: move ac_memory_ops_per_clock into ac_gpu_info.h

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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17973>
This commit is contained in:
Friedrich Vock 2022-06-14 12:01:10 +02:00 • committed by Marge Bot
parent 3340dea194
commit 82fd379d9e
3 changed files with 42 additions and 38 deletions
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23
src/amd/common/ac_gpu_info.c
View file

@ -2008,3 +2008,26 @@ void ac_get_task_info(struct radeon_info *info,
task_info->payload_ring_offset = ALIGN(task_info->draw_ring_offset + draw_ring_bytes, 256);
task_info->bo_size_bytes = task_info->payload_ring_offset + payload_ring_bytes;
}
uint32_t ac_memory_ops_per_clock(uint32_t vram_type)
{
switch (vram_type) {
case AMDGPU_VRAM_TYPE_UNKNOWN:
return 0;
case AMDGPU_VRAM_TYPE_DDR2:
case AMDGPU_VRAM_TYPE_DDR3:
case AMDGPU_VRAM_TYPE_DDR4:
case AMDGPU_VRAM_TYPE_HBM:
return 2;
case AMDGPU_VRAM_TYPE_DDR5:
case AMDGPU_VRAM_TYPE_GDDR5:
return 4;
case AMDGPU_VRAM_TYPE_GDDR6:
return 16;
case AMDGPU_VRAM_TYPE_GDDR1:
case AMDGPU_VRAM_TYPE_GDDR3:
case AMDGPU_VRAM_TYPE_GDDR4:
default:
unreachable("Invalid vram type");
}
}

19
src/amd/common/ac_gpu_info.h
View file

@ -33,6 +33,23 @@
#include <stdint.h>
#include <stdio.h>
#ifdef _WIN32
#define AMDGPU_VRAM_TYPE_UNKNOWN 0
#define AMDGPU_VRAM_TYPE_GDDR1 1
#define AMDGPU_VRAM_TYPE_DDR2 2
#define AMDGPU_VRAM_TYPE_GDDR3 3
#define AMDGPU_VRAM_TYPE_GDDR4 4
#define AMDGPU_VRAM_TYPE_GDDR5 5
#define AMDGPU_VRAM_TYPE_HBM 6
#define AMDGPU_VRAM_TYPE_DDR3 7
#define AMDGPU_VRAM_TYPE_DDR4 8
#define AMDGPU_VRAM_TYPE_GDDR6 9
#define AMDGPU_VRAM_TYPE_DDR5 10
#else
#include "drm-uapi/amdgpu_drm.h"
#endif
#include "util/macros.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -310,6 +327,8 @@ struct ac_task_info {
void ac_get_task_info(struct radeon_info *info,
struct ac_task_info *task_info);
uint32_t ac_memory_ops_per_clock(uint32_t vram_type);
#ifdef __cplusplus
}
#endif

38
src/amd/common/ac_rgp.c
View file

@ -32,21 +32,6 @@
#include "ac_spm.h"
#include "ac_sqtt.h"
#include "ac_gpu_info.h"
#ifdef _WIN32
#define AMDGPU_VRAM_TYPE_UNKNOWN 0
#define AMDGPU_VRAM_TYPE_GDDR1 1
#define AMDGPU_VRAM_TYPE_DDR2 2
#define AMDGPU_VRAM_TYPE_GDDR3 3
#define AMDGPU_VRAM_TYPE_GDDR4 4
#define AMDGPU_VRAM_TYPE_GDDR5 5
#define AMDGPU_VRAM_TYPE_HBM 6
#define AMDGPU_VRAM_TYPE_DDR3 7
#define AMDGPU_VRAM_TYPE_DDR4 8
#define AMDGPU_VRAM_TYPE_GDDR6 9
#define AMDGPU_VRAM_TYPE_DDR5 10
#else
#include "drm-uapi/amdgpu_drm.h"
#endif
#include <stdbool.h>
#include <string.h>
@ -405,29 +390,6 @@ static enum sqtt_memory_type ac_vram_type_to_sqtt_memory_type(uint32_t vram_type
}
}
static uint32_t ac_memory_ops_per_clock(uint32_t vram_type)
{
switch (vram_type) {
case AMDGPU_VRAM_TYPE_UNKNOWN:
return 0;
case AMDGPU_VRAM_TYPE_DDR2:
case AMDGPU_VRAM_TYPE_DDR3:
case AMDGPU_VRAM_TYPE_DDR4:
case AMDGPU_VRAM_TYPE_HBM:
return 2;
case AMDGPU_VRAM_TYPE_DDR5:
case AMDGPU_VRAM_TYPE_GDDR5:
return 4;
case AMDGPU_VRAM_TYPE_GDDR6:
return 16;
case AMDGPU_VRAM_TYPE_GDDR1:
case AMDGPU_VRAM_TYPE_GDDR3:
case AMDGPU_VRAM_TYPE_GDDR4:
default:
unreachable("Invalid vram type");
}
}
static void ac_sqtt_fill_asic_info(struct radeon_info *rad_info,
struct sqtt_file_chunk_asic_info *chunk)
{