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amd/common: move ac_memory_ops_per_clock into ac_gpu_info.h
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17973>
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3340dea194
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3 changed files with 42 additions and 38 deletions
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@ -2008,3 +2008,26 @@ void ac_get_task_info(struct radeon_info *info,
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task_info->payload_ring_offset = ALIGN(task_info->draw_ring_offset + draw_ring_bytes, 256);
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task_info->payload_ring_offset = ALIGN(task_info->draw_ring_offset + draw_ring_bytes, 256);
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task_info->bo_size_bytes = task_info->payload_ring_offset + payload_ring_bytes;
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task_info->bo_size_bytes = task_info->payload_ring_offset + payload_ring_bytes;
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}
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}
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uint32_t ac_memory_ops_per_clock(uint32_t vram_type)
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{
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switch (vram_type) {
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case AMDGPU_VRAM_TYPE_UNKNOWN:
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return 0;
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case AMDGPU_VRAM_TYPE_DDR2:
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case AMDGPU_VRAM_TYPE_DDR3:
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case AMDGPU_VRAM_TYPE_DDR4:
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case AMDGPU_VRAM_TYPE_HBM:
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return 2;
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case AMDGPU_VRAM_TYPE_DDR5:
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case AMDGPU_VRAM_TYPE_GDDR5:
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return 4;
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case AMDGPU_VRAM_TYPE_GDDR6:
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return 16;
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case AMDGPU_VRAM_TYPE_GDDR1:
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case AMDGPU_VRAM_TYPE_GDDR3:
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case AMDGPU_VRAM_TYPE_GDDR4:
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default:
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unreachable("Invalid vram type");
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}
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}
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@ -33,6 +33,23 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdio.h>
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#ifdef _WIN32
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#define AMDGPU_VRAM_TYPE_UNKNOWN 0
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#define AMDGPU_VRAM_TYPE_GDDR1 1
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#define AMDGPU_VRAM_TYPE_DDR2 2
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#define AMDGPU_VRAM_TYPE_GDDR3 3
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#define AMDGPU_VRAM_TYPE_GDDR4 4
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#define AMDGPU_VRAM_TYPE_GDDR5 5
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#define AMDGPU_VRAM_TYPE_HBM 6
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#define AMDGPU_VRAM_TYPE_DDR3 7
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#define AMDGPU_VRAM_TYPE_DDR4 8
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#define AMDGPU_VRAM_TYPE_GDDR6 9
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#define AMDGPU_VRAM_TYPE_DDR5 10
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#else
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#include "drm-uapi/amdgpu_drm.h"
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#endif
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#include "util/macros.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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@ -310,6 +327,8 @@ struct ac_task_info {
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void ac_get_task_info(struct radeon_info *info,
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void ac_get_task_info(struct radeon_info *info,
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struct ac_task_info *task_info);
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struct ac_task_info *task_info);
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uint32_t ac_memory_ops_per_clock(uint32_t vram_type);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -32,21 +32,6 @@
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#include "ac_spm.h"
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#include "ac_spm.h"
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#include "ac_sqtt.h"
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#include "ac_sqtt.h"
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#include "ac_gpu_info.h"
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#include "ac_gpu_info.h"
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#ifdef _WIN32
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#define AMDGPU_VRAM_TYPE_UNKNOWN 0
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#define AMDGPU_VRAM_TYPE_GDDR1 1
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#define AMDGPU_VRAM_TYPE_DDR2 2
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#define AMDGPU_VRAM_TYPE_GDDR3 3
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#define AMDGPU_VRAM_TYPE_GDDR4 4
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#define AMDGPU_VRAM_TYPE_GDDR5 5
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#define AMDGPU_VRAM_TYPE_HBM 6
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#define AMDGPU_VRAM_TYPE_DDR3 7
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#define AMDGPU_VRAM_TYPE_DDR4 8
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#define AMDGPU_VRAM_TYPE_GDDR6 9
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#define AMDGPU_VRAM_TYPE_DDR5 10
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#else
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#include "drm-uapi/amdgpu_drm.h"
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#endif
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#include <stdbool.h>
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#include <stdbool.h>
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#include <string.h>
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#include <string.h>
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@ -405,29 +390,6 @@ static enum sqtt_memory_type ac_vram_type_to_sqtt_memory_type(uint32_t vram_type
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}
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}
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}
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}
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static uint32_t ac_memory_ops_per_clock(uint32_t vram_type)
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{
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switch (vram_type) {
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case AMDGPU_VRAM_TYPE_UNKNOWN:
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return 0;
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case AMDGPU_VRAM_TYPE_DDR2:
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case AMDGPU_VRAM_TYPE_DDR3:
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case AMDGPU_VRAM_TYPE_DDR4:
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case AMDGPU_VRAM_TYPE_HBM:
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return 2;
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case AMDGPU_VRAM_TYPE_DDR5:
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case AMDGPU_VRAM_TYPE_GDDR5:
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return 4;
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case AMDGPU_VRAM_TYPE_GDDR6:
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return 16;
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case AMDGPU_VRAM_TYPE_GDDR1:
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case AMDGPU_VRAM_TYPE_GDDR3:
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case AMDGPU_VRAM_TYPE_GDDR4:
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default:
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unreachable("Invalid vram type");
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}
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}
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static void ac_sqtt_fill_asic_info(struct radeon_info *rad_info,
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static void ac_sqtt_fill_asic_info(struct radeon_info *rad_info,
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struct sqtt_file_chunk_asic_info *chunk)
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struct sqtt_file_chunk_asic_info *chunk)
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{
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{
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