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i965: Make a function to check the conditions to use the blitter

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No functional changes in the patch. Just makes the code look cleaner.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
This commit is contained in:
Anuj Phogat 2015-02-12 18:49:13 -08:00
parent 6960a3962c
commit 82f6d17300
1 changed files with 29 additions and 11 deletions
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40
src/mesa/drivers/dri/i965/intel_mipmap_tree.c
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@ -2305,6 +2305,34 @@ can_blit_slice(struct intel_mipmap_tree *mt,
return true;
}
static bool
use_intel_mipree_map_blit(struct brw_context *brw,
struct intel_mipmap_tree *mt,
GLbitfield mode,
unsigned int level,
unsigned int slice)
{
if (brw->has_llc &&
/* It's probably not worth swapping to the blit ring because of
* all the overhead involved.
*/
!(mode & GL_MAP_WRITE_BIT) &&
!mt->compressed &&
(mt->tiling == I915_TILING_X ||
/* Prior to Sandybridge, the blitter can't handle Y tiling */
(brw->gen >= 6 && mt->tiling == I915_TILING_Y)) &&
can_blit_slice(mt, level, slice))
return true;
if (mt->tiling != I915_TILING_NONE &&
mt->bo->size >= brw->max_gtt_map_object_size) {
assert(can_blit_slice(mt, level, slice));
return true;
}
return false;
}
/**
* Parameter \a out_stride has type ptrdiff_t not because the buffer stride may
* exceed 32 bits but to diminish the likelihood subtle bugs in pointer
@ -2352,17 +2380,7 @@ intel_miptree_map(struct brw_context *brw,
intel_miptree_map_etc(brw, mt, map, level, slice);
} else if (mt->stencil_mt && !(mode & BRW_MAP_DIRECT_BIT)) {
intel_miptree_map_depthstencil(brw, mt, map, level, slice);
}
else if (brw->has_llc &&
!(mode & GL_MAP_WRITE_BIT) &&
!mt->compressed &&
(mt->tiling == I915_TILING_X ||
(brw->gen >= 6 && mt->tiling == I915_TILING_Y)) &&
can_blit_slice(mt, level, slice)) {
intel_miptree_map_blit(brw, mt, map, level, slice);
} else if (mt->tiling != I915_TILING_NONE &&
mt->bo->size >= brw->max_gtt_map_object_size) {
assert(can_blit_slice(mt, level, slice));
} else if (use_intel_mipree_map_blit(brw, mt, mode, level, slice)) {
intel_miptree_map_blit(brw, mt, map, level, slice);
#if defined(USE_SSE41)
} else if (!(mode & GL_MAP_WRITE_BIT) && !mt->compressed && cpu_has_sse4_1) {