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r600/sfn: Don't read return values of atomic ops that are not used
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11348>
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parent
800bfefde5
commit
82c076d2c3
2 changed files with 48 additions and 8 deletions
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@ -112,12 +112,17 @@ bool EmitSSBOInstruction::do_emit(nir_instr* instr)
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bool EmitSSBOInstruction::emit_atomic(const nir_intrinsic_instr* instr)
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{
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ESDOp op = get_opcode(instr->intrinsic);
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bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
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ESDOp op = read_result ? get_opcode(instr->intrinsic) :
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get_opcode_wo(instr->intrinsic);
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if (DS_OP_INVALID == op)
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return false;
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GPRVector dest = make_dest(instr);
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GPRVector dest = read_result ? make_dest(instr) : GPRVector(0, {7,7,7,7});
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int base = remap_atomic_base(nir_intrinsic_base(instr));
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@ -139,12 +144,14 @@ bool EmitSSBOInstruction::emit_atomic(const nir_intrinsic_instr* instr)
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bool EmitSSBOInstruction::emit_unary_atomic(const nir_intrinsic_instr* instr)
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{
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ESDOp op = get_opcode(instr->intrinsic);
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bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
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ESDOp op = read_result ? get_opcode(instr->intrinsic) : get_opcode_wo(instr->intrinsic);
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if (DS_OP_INVALID == op)
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return false;
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GPRVector dest = make_dest(instr);
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GPRVector dest = read_result ? make_dest(instr) : GPRVector(0, {7,7,7,7});
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PValue uav_id = from_nir(instr->src[0], 0);
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@ -154,7 +161,7 @@ bool EmitSSBOInstruction::emit_unary_atomic(const nir_intrinsic_instr* instr)
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return true;
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}
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ESDOp EmitSSBOInstruction::get_opcode(const nir_intrinsic_op opcode)
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ESDOp EmitSSBOInstruction::get_opcode(const nir_intrinsic_op opcode) const
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{
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switch (opcode) {
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case nir_intrinsic_atomic_counter_add:
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@ -185,6 +192,35 @@ ESDOp EmitSSBOInstruction::get_opcode(const nir_intrinsic_op opcode)
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}
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}
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ESDOp EmitSSBOInstruction::get_opcode_wo(const nir_intrinsic_op opcode) const
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{
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switch (opcode) {
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case nir_intrinsic_atomic_counter_add:
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return DS_OP_ADD;
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case nir_intrinsic_atomic_counter_and:
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return DS_OP_AND;
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case nir_intrinsic_atomic_counter_inc:
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return DS_OP_INC;
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case nir_intrinsic_atomic_counter_max:
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return DS_OP_MAX_UINT;
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case nir_intrinsic_atomic_counter_min:
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return DS_OP_MIN_UINT;
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case nir_intrinsic_atomic_counter_or:
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return DS_OP_OR;
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case nir_intrinsic_atomic_counter_xor:
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return DS_OP_XOR;
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case nir_intrinsic_atomic_counter_post_dec:
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return DS_OP_DEC;
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case nir_intrinsic_atomic_counter_comp_swap:
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return DS_OP_CMP_XCHG_RET;
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case nir_intrinsic_atomic_counter_exchange:
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return DS_OP_XCHG_RET;
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case nir_intrinsic_atomic_counter_pre_dec:
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default:
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return DS_OP_INVALID;
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}
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}
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RatInstruction::ERatOp
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EmitSSBOInstruction::get_rat_opcode(const nir_intrinsic_op opcode, pipe_format format) const
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{
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@ -279,9 +315,11 @@ bool EmitSSBOInstruction::load_atomic_inc_limits()
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bool EmitSSBOInstruction::emit_atomic_inc(const nir_intrinsic_instr* instr)
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{
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bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
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PValue uav_id = from_nir(instr->src[0], 0);
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GPRVector dest = make_dest(instr);
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auto ir = new GDSInstr(DS_OP_ADD_RET, dest, m_atomic_update, uav_id,
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GPRVector dest = read_result ? make_dest(instr): GPRVector(0, {7,7,7,7});
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auto ir = new GDSInstr(read_result ? DS_OP_ADD_RET : DS_OP_ADD, dest,
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m_atomic_update, uav_id,
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remap_atomic_base(nir_intrinsic_base(instr)));
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emit_instruction(ir);
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return true;
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@ -38,7 +38,9 @@ private:
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bool make_stores_ack_and_waitack();
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ESDOp get_opcode(nir_intrinsic_op opcode);
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ESDOp get_opcode(nir_intrinsic_op opcode) const;
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ESDOp get_opcode_wo(const nir_intrinsic_op opcode) const;
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RatInstruction::ERatOp get_rat_opcode(const nir_intrinsic_op opcode, pipe_format format) const;
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RatInstruction::ERatOp get_rat_opcode_wo(const nir_intrinsic_op opcode, pipe_format format) const;
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