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radeonsi: adjust checking for SC bug workarounds

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no change in behavior, just making sure that no later chips will use
the workarounds

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2017-02-27 23:17:07 +01:00
parent 2936f5c37e
commit 829bd77235
3 changed files with 13 additions and 4 deletions
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4
src/gallium/drivers/radeonsi/si_pipe.c
View file

@ -846,6 +846,10 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
sscreen->has_ds_bpermute = HAVE_LLVM >= 0x0309 &&
sscreen->b.chip_class >= VI;
sscreen->has_msaa_sample_loc_bug = (sscreen->b.family >= CHIP_POLARIS10 &&
sscreen->b.family <= CHIP_POLARIS12) ||
sscreen->b.family == CHIP_VEGA10;
sscreen->b.has_cp_dma = true;
sscreen->b.has_streamout = true;

1
src/gallium/drivers/radeonsi/si_pipe.h
View file

@ -79,6 +79,7 @@ struct si_screen {
bool has_distributed_tess;
bool has_draw_indirect_multi;
bool has_ds_bpermute;
bool has_msaa_sample_loc_bug;
/* Whether shaders are monolithic (1-part) or separate (3-part). */
bool use_monolithic_shaders;

12
src/gallium/drivers/radeonsi/si_state.c
View file

@ -921,7 +921,7 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
si_mark_atom_dirty(sctx, &sctx->db_render_state);
/* Update the small primitive filter workaround if necessary. */
if (sctx->b.family >= CHIP_POLARIS10 &&
if (sctx->screen->has_msaa_sample_loc_bug &&
sctx->framebuffer.nr_samples > 1)
si_mark_atom_dirty(sctx, &sctx->msaa_sample_locs.atom);
}
@ -2861,6 +2861,7 @@ static void si_emit_msaa_sample_locs(struct si_context *sctx,
{
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
unsigned nr_samples = sctx->framebuffer.nr_samples;
bool has_msaa_sample_loc_bug = sctx->screen->has_msaa_sample_loc_bug;
/* Smoothing (only possible with nr_samples == 1) uses the same
* sample locations as the MSAA it simulates.
@ -2871,7 +2872,7 @@ static void si_emit_msaa_sample_locs(struct si_context *sctx,
/* On Polaris, the small primitive filter uses the sample locations
* even when MSAA is off, so we need to make sure they're set to 0.
*/
if (sctx->b.family >= CHIP_POLARIS10)
if (has_msaa_sample_loc_bug)
nr_samples = MAX2(nr_samples, 1);
if (nr_samples >= 1 &&
@ -2884,13 +2885,16 @@ static void si_emit_msaa_sample_locs(struct si_context *sctx,
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
unsigned small_prim_filter_cntl =
S_028830_SMALL_PRIM_FILTER_ENABLE(1) |
S_028830_LINE_FILTER_DISABLE(sctx->b.chip_class == VI); /* line bug */
/* line bug */
S_028830_LINE_FILTER_DISABLE(sctx->b.family <= CHIP_POLARIS12);
/* The alternative of setting sample locations to 0 would
* require a DB flush to avoid Z errors, see
* https://bugs.freedesktop.org/show_bug.cgi?id=96908
*/
if (sctx->framebuffer.nr_samples > 1 && rs && !rs->multisample_enable)
if (has_msaa_sample_loc_bug &&
sctx->framebuffer.nr_samples > 1 &&
rs && !rs->multisample_enable)
small_prim_filter_cntl &= C_028830_SMALL_PRIM_FILTER_ENABLE;
radeon_set_context_reg(cs, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL,