diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 8331c5ea6f4..6e7f88198f7 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -5803,6 +5803,15 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, so->constlen = MAX2(so->constlen, 4); } + if (gl_shader_stage_is_compute(so->type)) { + so->cs.local_invocation_id = + ir3_find_sysval_regid(so, SYSTEM_VALUE_LOCAL_INVOCATION_ID); + so->cs.work_group_id = + ir3_find_sysval_regid(so, SYSTEM_VALUE_WORKGROUP_ID); + } else { + so->vtxid_base = ir3_find_sysval_regid(so, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE); + } + out: if (ret) { if (so->ir) diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h index fd58aad105c..5bb689341ec 100644 --- a/src/freedreno/ir3/ir3_shader.h +++ b/src/freedreno/ir3/ir3_shader.h @@ -839,9 +839,13 @@ struct ir3_shader_variant { unsigned req_input_mem; unsigned req_local_mem; bool force_linear_dispatch; + uint32_t local_invocation_id; + uint32_t work_group_id; } cs; }; + uint32_t vtxid_base; + /* For when we don't have a shader, variant's copy of streamout state */ struct ir3_stream_output_info stream_output; }; diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_compute.cc b/src/gallium/drivers/freedreno/a6xx/fd6_compute.cc index aa22ccbc86b..7c6515f40e1 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_compute.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_compute.cc @@ -51,10 +51,8 @@ cs_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, A6XX_SP_CS_CONFIG_NTEX(v->num_samp) | A6XX_SP_CS_CONFIG_NSAMP(v->num_samp)); /* SP_CS_CONFIG */ - uint32_t local_invocation_id, work_group_id; - local_invocation_id = - ir3_find_sysval_regid(v, SYSTEM_VALUE_LOCAL_INVOCATION_ID); - work_group_id = ir3_find_sysval_regid(v, SYSTEM_VALUE_WORKGROUP_ID); + uint32_t local_invocation_id = v->cs.local_invocation_id; + uint32_t work_group_id = v->cs.work_group_id; /* * Devices that do not support double threadsize take the threadsize from diff --git a/src/gallium/drivers/freedreno/ir3/ir3_const.h b/src/gallium/drivers/freedreno/ir3/ir3_const.h index 692db03d7a8..156b3855926 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_const.h +++ b/src/gallium/drivers/freedreno/ir3/ir3_const.h @@ -466,16 +466,12 @@ ir3_emit_driver_params(const struct ir3_shader_variant *v, MIN2(const_state->num_driver_params, (v->constlen - offset) * 4); assert(vertex_params_size <= IR3_DP_VS_COUNT); - bool needs_vtxid_base = - ir3_find_sysval_regid(v, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) != - regid(63, 0); - /* for indirect draw, we need to copy VTXID_BASE from * indirect-draw parameters buffer.. which is annoying * and means we can't easily emit these consts in cmd * stream so need to copy them to bo. */ - if (indirect && needs_vtxid_base) { + if (indirect && v->vtxid_base != INVALID_REG) { uint32_t vertex_params_area = align(vertex_params_size, 16); struct pipe_resource *vertex_params_rsc = pipe_buffer_create(&ctx->screen->base, PIPE_BIND_CONSTANT_BUFFER,