fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 08:58:02 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

aco: export depth/stencil/samplemask in create_fs_jump_to_epilog()

Browse source 
This currently has no effects because the store_output instructions
are removed earlier (in ac_nir_lower_ps). Though, this will be needed
for exporting MRTZ from PS epilogs for alpha to coverage on RDNA3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26413>
This commit is contained in:
Samuel Pitoiset 2023-11-16 16:54:30 +01:00 • committed by Marge Bot
parent 680f249c9f
commit 81eeb157f8
1 changed files with 13 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -10928,7 +10928,19 @@ create_fs_jump_to_epilog(isel_context* ctx)
{
Builder bld(ctx->program, ctx->block);
std::vector<Operand> exports;
PhysReg exports_start(256); /* VGPR 0 */
unsigned vgpr = 256; /* VGPR 0 */
if (ctx->outputs.mask[FRAG_RESULT_DEPTH])
exports.emplace_back(Operand(ctx->outputs.temps[FRAG_RESULT_DEPTH * 4u], PhysReg{vgpr++}));
if (ctx->outputs.mask[FRAG_RESULT_STENCIL])
exports.emplace_back(Operand(ctx->outputs.temps[FRAG_RESULT_STENCIL * 4u], PhysReg{vgpr++}));
if (ctx->outputs.mask[FRAG_RESULT_SAMPLE_MASK])
exports.emplace_back(
Operand(ctx->outputs.temps[FRAG_RESULT_SAMPLE_MASK * 4u], PhysReg{vgpr++}));
PhysReg exports_start(vgpr);
for (unsigned slot = FRAG_RESULT_DATA0; slot < FRAG_RESULT_DATA7 + 1; ++slot) {
unsigned color_index = slot - FRAG_RESULT_DATA0;