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nir_to_tgsi: Fix the address reg mapping for images and SSBOs to match G-T-T.
I missed these in the previous fix to mimic GLSL-to-TGSI address reg behavior, which r600 relies on. Fixes:4bb9c0a28a("nir_to_tgsi: Use the same address reg mappings as GLSL-to-TGSI did.") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15824> (cherry picked from commite15154a735) Conflicts: src/gallium/auxiliary/nir/nir_to_tgsi.c
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parent
7148f7d003
commit
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2 changed files with 8 additions and 8 deletions
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@ -3284,7 +3284,7 @@
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"description": "nir_to_tgsi: Fix the address reg mapping for images and SSBOs to match G-T-T.",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"because_sha": "4bb9c0a28a5f06341060353dba1a017d154d51a4"
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},
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{
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@ -1245,13 +1245,13 @@ ntt_emit_alu(struct ntt_compile *c, nir_alu_instr *instr)
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static struct ureg_src
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ntt_ureg_src_indirect(struct ntt_compile *c, struct ureg_src usrc,
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nir_src src)
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nir_src src, int addr_reg)
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{
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if (nir_src_is_const(src)) {
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usrc.Index += ntt_src_as_uint(c, src);
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return usrc;
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} else {
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return ureg_src_indirect(usrc, ntt_reladdr(c, ntt_get_src(c, src), 0));
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return ureg_src_indirect(usrc, ntt_reladdr(c, ntt_get_src(c, src), addr_reg));
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}
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}
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@ -1412,7 +1412,7 @@ ntt_emit_mem(struct ntt_compile *c, nir_intrinsic_instr *instr,
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switch (mode) {
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case nir_var_mem_ssbo:
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memory = ntt_ureg_src_indirect(c, ureg_src_register(TGSI_FILE_BUFFER, 0),
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instr->src[is_store ? 1 : 0]);
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instr->src[is_store ? 1 : 0], 2);
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nir_src = 1;
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break;
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case nir_var_mem_shared:
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@ -1576,7 +1576,7 @@ ntt_emit_image_load_store(struct ntt_compile *c, nir_intrinsic_instr *instr)
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struct ureg_src resource =
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ntt_ureg_src_indirect(c, ureg_src_register(TGSI_FILE_IMAGE, 0),
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instr->src[0]);
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instr->src[0], 2);
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struct ureg_dst dst;
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if (instr->intrinsic == nir_intrinsic_image_store) {
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@ -1703,18 +1703,18 @@ ntt_emit_load_input(struct ntt_compile *c, nir_intrinsic_instr *instr)
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switch (instr->intrinsic) {
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case nir_intrinsic_load_input:
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input = ntt_ureg_src_indirect(c, input, instr->src[0]);
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input = ntt_ureg_src_indirect(c, input, instr->src[0], 0);
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ntt_store(c, &instr->dest, input);
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break;
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case nir_intrinsic_load_per_vertex_input:
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input = ntt_ureg_src_indirect(c, input, instr->src[1]);
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input = ntt_ureg_src_indirect(c, input, instr->src[1], 0);
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input = ntt_ureg_src_dimension_indirect(c, input, instr->src[0]);
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ntt_store(c, &instr->dest, input);
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break;
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case nir_intrinsic_load_interpolated_input: {
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input = ntt_ureg_src_indirect(c, input, instr->src[1]);
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input = ntt_ureg_src_indirect(c, input, instr->src[1], 0);
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nir_intrinsic_instr *bary_instr =
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nir_instr_as_intrinsic(instr->src[0].ssa->parent_instr);
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