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pan/midgard: constify pointers
This makes it easier to reason about what arguments are going to be modified and what aren't. Reviewed-by: Eric R. Smith <eric.smith@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32851>
This commit is contained in:
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430f7e991f
commit
80bacbba23
8 changed files with 49 additions and 45 deletions
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@ -516,34 +516,34 @@ void mir_rewrite_index_src_swizzle(compiler_context *ctx, unsigned old,
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unsigned new, unsigned *swizzle);
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bool mir_single_use(compiler_context *ctx, unsigned value);
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unsigned mir_use_count(compiler_context *ctx, unsigned value);
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uint16_t mir_bytemask_of_read_components(midgard_instruction *ins,
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uint16_t mir_bytemask_of_read_components(const midgard_instruction *ins,
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unsigned node);
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uint16_t mir_bytemask_of_read_components_index(midgard_instruction *ins,
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uint16_t mir_bytemask_of_read_components_index(const midgard_instruction *ins,
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unsigned i);
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uint16_t mir_from_bytemask(uint16_t bytemask, unsigned bits);
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uint16_t mir_bytemask(midgard_instruction *ins);
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uint16_t mir_bytemask(const midgard_instruction *ins);
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uint16_t mir_round_bytemask_up(uint16_t mask, unsigned bits);
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void mir_set_bytemask(midgard_instruction *ins, uint16_t bytemask);
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signed mir_upper_override(midgard_instruction *ins, unsigned inst_size);
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signed mir_upper_override(const midgard_instruction *ins, unsigned inst_size);
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unsigned mir_components_for_type(nir_alu_type T);
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unsigned max_bitsize_for_alu(midgard_instruction *ins);
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unsigned max_bitsize_for_alu(const midgard_instruction *ins);
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midgard_reg_mode reg_mode_for_bitsize(unsigned bitsize);
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/* MIR printing */
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void mir_print_instruction(midgard_instruction *ins);
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void mir_print_bundle(midgard_bundle *ctx);
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void mir_print_block(midgard_block *block);
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void mir_print_shader(compiler_context *ctx);
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bool mir_nontrivial_mod(midgard_instruction *ins, unsigned i,
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void mir_print_instruction(const midgard_instruction *ins);
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void mir_print_bundle(const midgard_bundle *ctx);
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void mir_print_block(const midgard_block *block);
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void mir_print_shader(const compiler_context *ctx);
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bool mir_nontrivial_mod(const midgard_instruction *ins, unsigned i,
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bool check_swizzle);
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bool mir_nontrivial_outmod(midgard_instruction *ins);
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bool mir_nontrivial_outmod(const midgard_instruction *ins);
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midgard_instruction *mir_insert_instruction_before_scheduled(
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compiler_context *ctx, midgard_block *block, midgard_instruction *tag,
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compiler_context *ctx, midgard_block *block, const midgard_instruction *tag,
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midgard_instruction ins);
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midgard_instruction *mir_insert_instruction_after_scheduled(
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compiler_context *ctx, midgard_block *block, midgard_instruction *tag,
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compiler_context *ctx, midgard_block *block, const midgard_instruction *tag,
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midgard_instruction ins);
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void mir_flip(midgard_instruction *ins);
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void mir_compute_temp_count(compiler_context *ctx);
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@ -635,7 +635,7 @@ v_load_store_scratch(unsigned srcdest, unsigned index, bool is_store,
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}
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static inline bool
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mir_has_arg(midgard_instruction *ins, unsigned arg)
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mir_has_arg(const midgard_instruction *ins, unsigned arg)
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{
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if (!ins)
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return false;
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@ -655,12 +655,12 @@ void midgard_schedule_program(compiler_context *ctx);
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void mir_ra(compiler_context *ctx);
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void mir_squeeze_index(compiler_context *ctx);
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void mir_lower_special_reads(compiler_context *ctx);
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void mir_liveness_ins_update(uint16_t *live, midgard_instruction *ins,
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void mir_liveness_ins_update(uint16_t *live, const midgard_instruction *ins,
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unsigned max);
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void mir_compute_liveness(compiler_context *ctx);
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void mir_invalidate_liveness(compiler_context *ctx);
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bool mir_is_live_after(compiler_context *ctx, midgard_block *block,
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midgard_instruction *start, int src);
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bool mir_is_live_after(compiler_context *ctx, const midgard_block *block,
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const midgard_instruction *start, int src);
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void mir_create_pipeline_registers(compiler_context *ctx);
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void midgard_promote_uniforms(compiler_context *ctx);
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@ -408,7 +408,8 @@ midgard_is_branch_unit(unsigned unit)
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/* Packs ALU mod argument */
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struct midgard_instruction;
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unsigned mir_pack_mod(struct midgard_instruction *ins, unsigned i, bool scalar);
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unsigned mir_pack_mod(const struct midgard_instruction *ins, unsigned i,
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bool scalar);
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void mir_print_constant_component(FILE *fp, const midgard_constants *consts,
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unsigned c, midgard_reg_mode reg_mode,
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@ -2452,7 +2452,7 @@ inline_alu_constants(compiler_context *ctx, midgard_block *block)
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}
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unsigned
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max_bitsize_for_alu(midgard_instruction *ins)
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max_bitsize_for_alu(const midgard_instruction *ins)
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{
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unsigned max_bitsize = 0;
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for (int i = 0; i < MIR_SRC_COUNT; i++) {
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@ -78,7 +78,7 @@ midgard_unpack_varying_params(midgard_load_store_word word)
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}
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unsigned
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mir_pack_mod(midgard_instruction *ins, unsigned i, bool scalar)
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mir_pack_mod(const midgard_instruction *ins, unsigned i, bool scalar)
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{
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bool integer = midgard_is_integer_op(ins->op);
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unsigned base_size = max_bitsize_for_alu(ins);
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@ -25,7 +25,8 @@
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#include "compiler.h"
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void
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mir_liveness_ins_update(uint16_t *live, midgard_instruction *ins, unsigned max)
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mir_liveness_ins_update(uint16_t *live, const midgard_instruction *ins,
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unsigned max)
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{
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/* live_in[s] = GEN[s] + (live_out[s] - KILL[s]) */
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@ -76,8 +77,8 @@ mir_invalidate_liveness(compiler_context *ctx)
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}
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bool
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mir_is_live_after(compiler_context *ctx, midgard_block *block,
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midgard_instruction *start, int src)
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mir_is_live_after(compiler_context *ctx, const midgard_block *block,
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const midgard_instruction *start, int src)
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{
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mir_compute_liveness(ctx);
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@ -79,7 +79,7 @@ mir_print_mask(unsigned mask)
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* don't matter.
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*/
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static void
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mir_print_swizzle(unsigned mask, unsigned *swizzle)
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mir_print_swizzle(unsigned mask, const unsigned *swizzle)
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{
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printf(".");
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@ -115,7 +115,7 @@ mir_get_unit(unsigned unit)
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}
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static void
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mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx)
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mir_print_embedded_constant(const midgard_instruction *ins, unsigned src_idx)
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{
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assert(src_idx <= 1);
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@ -123,7 +123,7 @@ mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx)
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unsigned sz = nir_alu_type_get_type_size(ins->src_types[src_idx]);
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bool half = (sz == (base_size >> 1));
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unsigned mod = mir_pack_mod(ins, src_idx, false);
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unsigned *swizzle = ins->swizzle[src_idx];
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const unsigned *swizzle = ins->swizzle[src_idx];
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midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins));
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unsigned comp_mask = effective_writemask(ins->op, ins->mask);
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unsigned num_comp = util_bitcount(comp_mask);
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@ -153,7 +153,7 @@ mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx)
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}
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static void
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mir_print_src(midgard_instruction *ins, unsigned c)
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mir_print_src(const midgard_instruction *ins, unsigned c)
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{
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mir_print_index(ins->src[c]);
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@ -164,7 +164,7 @@ mir_print_src(midgard_instruction *ins, unsigned c)
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}
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void
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mir_print_instruction(midgard_instruction *ins)
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mir_print_instruction(const midgard_instruction *ins)
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{
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printf("\t");
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@ -326,7 +326,7 @@ mir_print_instruction(midgard_instruction *ins)
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/* Dumps MIR for a block or entire shader respective */
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void
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mir_print_block(midgard_block *block)
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mir_print_block(const midgard_block *block)
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{
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printf("block%u: {\n", block->base.name);
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@ -360,9 +360,9 @@ mir_print_block(midgard_block *block)
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}
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void
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mir_print_shader(compiler_context *ctx)
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mir_print_shader(const compiler_context *ctx)
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{
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mir_foreach_block(ctx, block) {
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mir_print_block((midgard_block *)block);
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mir_print_block((const midgard_block *)block);
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}
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}
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@ -445,7 +445,7 @@ mir_compute_interference(compiler_context *ctx, struct lcra_state *l)
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}
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static bool
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mir_is_64(midgard_instruction *ins)
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mir_is_64(const midgard_instruction *ins)
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{
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if (nir_alu_type_get_type_size(ins->dest_type) == 64)
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return true;
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@ -463,7 +463,7 @@ mir_is_64(midgard_instruction *ins)
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* allocation. TODO: Optimize if barriers and local memory are unused.
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*/
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static bool
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needs_contiguous_workgroup(compiler_context *ctx)
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needs_contiguous_workgroup(const compiler_context *ctx)
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{
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return gl_shader_stage_uses_workgroup(ctx->stage);
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}
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@ -475,7 +475,7 @@ needs_contiguous_workgroup(compiler_context *ctx)
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* workgroups.
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*/
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static unsigned
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max_threads_per_workgroup(compiler_context *ctx)
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max_threads_per_workgroup(const compiler_context *ctx)
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{
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if (ctx->nir->info.workgroup_size_variable) {
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return 128;
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@ -502,7 +502,7 @@ max_threads_per_workgroup(compiler_context *ctx)
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* work properly).
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*/
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static unsigned
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max_work_registers(compiler_context *ctx)
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max_work_registers(const compiler_context *ctx)
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{
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if (ctx->inputs->is_blend)
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return 8;
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@ -128,7 +128,8 @@ mir_single_use(compiler_context *ctx, unsigned value)
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}
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bool
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mir_nontrivial_mod(midgard_instruction *ins, unsigned i, bool check_swizzle)
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mir_nontrivial_mod(const midgard_instruction *ins, unsigned i,
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bool check_swizzle)
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{
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bool is_int = midgard_is_integer_op(ins->op);
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@ -158,7 +159,7 @@ mir_nontrivial_mod(midgard_instruction *ins, unsigned i, bool check_swizzle)
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}
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bool
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mir_nontrivial_outmod(midgard_instruction *ins)
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mir_nontrivial_outmod(const midgard_instruction *ins)
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{
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bool is_int = midgard_is_integer_op(ins->op);
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unsigned mod = ins->outmod;
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@ -232,7 +233,7 @@ mir_round_bytemask_up(uint16_t mask, unsigned bits)
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/* Grabs the per-byte mask of an instruction (as opposed to per-component) */
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uint16_t
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mir_bytemask(midgard_instruction *ins)
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mir_bytemask(const midgard_instruction *ins)
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{
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unsigned type_size = nir_alu_type_get_type_size(ins->dest_type);
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return pan_to_bytemask(type_size, ins->mask);
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@ -251,7 +252,7 @@ mir_set_bytemask(midgard_instruction *ins, uint16_t bytemask)
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* for a lower override and negative for no override.
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*/
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signed
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mir_upper_override(midgard_instruction *ins, unsigned inst_size)
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mir_upper_override(const midgard_instruction *ins, unsigned inst_size)
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{
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unsigned type_size = nir_alu_type_get_type_size(ins->dest_type);
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@ -282,7 +283,7 @@ mir_upper_override(midgard_instruction *ins, unsigned inst_size)
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*/
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static uint16_t
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mir_bytemask_of_read_components_single(unsigned *swizzle, unsigned inmask,
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mir_bytemask_of_read_components_single(const unsigned *swizzle, unsigned inmask,
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unsigned bits)
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{
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unsigned cmask = 0;
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@ -297,7 +298,8 @@ mir_bytemask_of_read_components_single(unsigned *swizzle, unsigned inmask,
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}
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uint16_t
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mir_bytemask_of_read_components_index(midgard_instruction *ins, unsigned i)
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mir_bytemask_of_read_components_index(const midgard_instruction *ins,
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unsigned i)
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{
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/* Conditional branches read one 32-bit component = 4 bytes (TODO: multi
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* branch??) */
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@ -326,7 +328,7 @@ mir_bytemask_of_read_components_index(midgard_instruction *ins, unsigned i)
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}
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uint16_t
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mir_bytemask_of_read_components(midgard_instruction *ins, unsigned node)
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mir_bytemask_of_read_components(const midgard_instruction *ins, unsigned node)
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{
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uint16_t mask = 0;
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@ -374,7 +376,7 @@ mir_bundle_for_op(compiler_context *ctx, midgard_instruction ins)
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}
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static unsigned
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mir_bundle_idx_for_ins(midgard_instruction *tag, midgard_block *block)
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mir_bundle_idx_for_ins(const midgard_instruction *tag, midgard_block *block)
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{
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midgard_bundle *bundles = (midgard_bundle *)block->bundles.data;
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@ -394,7 +396,7 @@ mir_bundle_idx_for_ins(midgard_instruction *tag, midgard_block *block)
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midgard_instruction *
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mir_insert_instruction_before_scheduled(compiler_context *ctx,
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midgard_block *block,
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midgard_instruction *tag,
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const midgard_instruction *tag,
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midgard_instruction ins)
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{
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unsigned before = mir_bundle_idx_for_ins(tag, block);
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@ -419,7 +421,7 @@ mir_insert_instruction_before_scheduled(compiler_context *ctx,
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midgard_instruction *
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mir_insert_instruction_after_scheduled(compiler_context *ctx,
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midgard_block *block,
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midgard_instruction *tag,
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const midgard_instruction *tag,
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midgard_instruction ins)
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{
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/* We need to grow the bundles array to add our new bundle */
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