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synced 2026-05-06 11:38:05 +02:00
radeonsi: remove shader->input[] and output[] arrays and dependencies
They were reinventing tgsi_shader_info. They are unused now. radeon_llvm_context::load_input can be NULL if input fetching is implemented in some other way. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
parent
8b057ddaea
commit
8067732740
3 changed files with 2 additions and 89 deletions
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@ -275,7 +275,8 @@ static void emit_declaration(
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{
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unsigned idx;
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for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) {
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ctx->load_input(ctx, idx, decl);
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if (ctx->load_input)
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ctx->load_input(ctx, idx, decl);
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}
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}
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break;
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@ -233,33 +233,6 @@ static LLVMValueRef get_instance_index_for_fetch(
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return result;
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}
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static int si_store_shader_io_attribs(struct si_shader *shader,
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const struct tgsi_full_declaration *d)
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{
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int i = -1;
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switch (d->Declaration.File) {
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case TGSI_FILE_INPUT:
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i = shader->ninput++;
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assert(i < Elements(shader->input));
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shader->input[i].name = d->Semantic.Name;
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shader->input[i].sid = d->Semantic.Index;
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shader->input[i].index = d->Range.First;
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shader->input[i].interpolate = d->Interp.Interpolate;
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return -1;
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case TGSI_FILE_OUTPUT:
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i = shader->noutput++;
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assert(i < Elements(shader->output));
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shader->output[i].name = d->Semantic.Name;
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shader->output[i].sid = d->Semantic.Index;
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shader->output[i].index = d->Range.First;
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break;
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}
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return i;
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}
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static void declare_input_vs(
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struct radeon_llvm_context *radeon_bld,
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unsigned input_index,
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@ -324,18 +297,6 @@ static void declare_input_vs(
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}
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}
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static void declare_input_gs(
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struct radeon_llvm_context *radeon_bld,
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unsigned input_index,
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const struct tgsi_full_declaration *decl)
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{
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struct si_shader_context *si_shader_ctx =
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si_shader_context(&radeon_bld->soa.bld_base);
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struct si_shader *shader = si_shader_ctx->shader;
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si_store_shader_io_attribs(shader, decl);
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}
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static LLVMValueRef fetch_input_gs(
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struct lp_build_tgsi_context *bld_base,
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const struct tgsi_full_src_register *reg,
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@ -1347,7 +1308,6 @@ static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context * bld_base)
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{
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struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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struct si_shader *shader = si_shader_ctx->shader;
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struct tgsi_parse_context *parse = &si_shader_ctx->parse;
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struct si_shader_output_values *outputs = NULL;
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unsigned noutput = 0;
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@ -1363,10 +1323,6 @@ static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context * bld_base)
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if (parse->FullToken.Token.Type != TGSI_TOKEN_TYPE_DECLARATION)
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continue;
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i = si_store_shader_io_attribs(shader, d);
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if (i < 0)
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continue;
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outputs = REALLOC(outputs, noutput * sizeof(outputs[0]),
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(noutput + 1) * sizeof(outputs[0]));
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for (index = d->Range.First; index <= d->Range.Last; index++) {
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@ -1399,7 +1355,6 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
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LLVMValueRef last_args[9] = { 0 };
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unsigned semantic_name;
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int depth_index = -1, stencil_index = -1, samplemask_index = -1;
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int i;
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while (!tgsi_parse_end_of_tokens(parse)) {
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struct tgsi_full_declaration *d =
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@ -1412,10 +1367,6 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
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if (parse->FullToken.Token.Type != TGSI_TOKEN_TYPE_DECLARATION)
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continue;
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i = si_store_shader_io_attribs(shader, d);
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if (i < 0)
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continue;
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semantic_name = d->Semantic.Name;
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for (index = d->Range.First; index <= d->Range.Last; index++) {
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/* Select the correct target */
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@ -2251,21 +2202,6 @@ static void si_llvm_emit_vertex(
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t_list = build_indexed_load(si_shader_ctx, t_list_ptr,
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lp_build_const_int32(gallivm, SI_RING_GSVS));
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if (shader->noutput == 0) {
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struct tgsi_parse_context *parse = &si_shader_ctx->parse;
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while (!tgsi_parse_end_of_tokens(parse)) {
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tgsi_parse_token(parse);
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if (parse->FullToken.Token.Type == TGSI_TOKEN_TYPE_DECLARATION) {
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struct tgsi_full_declaration *d = &parse->FullToken.FullDeclaration;
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if (d->Declaration.File == TGSI_FILE_OUTPUT)
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si_store_shader_io_attribs(shader, d);
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}
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}
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}
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/* Write vertex attribute values to GSVS ring */
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gs_next_vertex = LLVMBuildLoad(gallivm->builder, si_shader_ctx->gs_next_vertex, "");
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@ -2784,9 +2720,7 @@ int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
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si_dump_streamout(&sel->so);
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}
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assert(shader->noutput == 0);
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assert(shader->nparam == 0);
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assert(shader->ninput == 0);
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memset(&si_shader_ctx, 0, sizeof(si_shader_ctx));
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radeon_llvm_context_init(&si_shader_ctx.radeon_bld);
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@ -2834,7 +2768,6 @@ int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
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}
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break;
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case TGSI_PROCESSOR_GEOMETRY:
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si_shader_ctx.radeon_bld.load_input = declare_input_gs;
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bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_gs;
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bld_base->emit_epilogue = si_llvm_emit_gs_epilogue;
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break;
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@ -96,21 +96,6 @@
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#define SI_NUM_PARAMS (SI_PARAM_POS_FIXED_PT + 1)
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struct si_shader_input {
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unsigned name;
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int sid;
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unsigned param_offset;
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unsigned index;
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unsigned interpolate;
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};
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struct si_shader_output {
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unsigned name;
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int sid;
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unsigned param_offset;
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unsigned index;
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};
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struct si_shader;
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struct si_shader_selector {
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@ -167,12 +152,6 @@ struct si_shader {
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unsigned cb_shader_mask;
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union si_shader_key key;
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unsigned ninput;
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struct si_shader_input input[40];
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unsigned noutput;
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struct si_shader_output output[40];
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unsigned nparam;
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unsigned vs_output_param_offset[PIPE_MAX_SHADER_OUTPUTS];
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unsigned ps_input_param_offset[PIPE_MAX_SHADER_INPUTS];
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