fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-02-14 09:00:28 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

nvc0: increase texture buffer object alignment to 256 for pre-GM107

Browse source 
We currently don't pass the low byte of the address via the surface
info, so in order to work with images, these have to implicitly be
aligned to 256. The proprietary driver also doesn't go out of its way to
provide lower alignment.

Fixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
Ilia Mirkin 2017-04-08 14:56:16 -04:00
parent 8ffd54fef8
commit 8036809799
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -147,7 +147,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
return 256;
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
if (class_3d < NVE4_3D_CLASS)
if (class_3d < GM107_3D_CLASS)
return 256; /* IMAGE bindings require alignment to 256 */
return 16;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: